DesignWare USB 2.0 OTG Controller (DWC_otg) Device Driver Data Structures

Here are the data structures with brief descriptions:
_ddma_align_buffer_setupDescriptor DMA Alignment Buffer setup structure
_ddma_concat_buffer_setupDescriptor DMA Concatenation Buffer setup structure
_ddma_concat_buffer_setup_hdrDescriptor DMA Concatenation Buffer setup structure
_ddma_sg_buffer_setupDescriptor DMA SG Buffer setup structure (SG buffer)
_rx_fifo_size_setupTransmit FIFO Size setup structure
_tx_fifo_size_setupTransmit FIFO Size setup structure
cfi_all_features_headerThis structure is the header of the Core Features dataset returned to the Host
cfi_dma_buff
cfi_epThe CFI wrapper of the enabled and activated dwc_otg_pcd_ep structures
cfi_feature_desc_headerThis structure is a header of the Core Feature descriptor dataset returned to the Host after the VEN_CORE_GET_FEATURES request
cfi_opsThis is the interface for the CFI operations
cfi_stringThis structure describes a NULL terminated string referenced by its id field
cfi_usb_ctrlrequestStruct cfi_usb_ctrlrequest - the CFI implementation of the struct usb_ctrlrequest This structure encapsulates the standard usb_ctrlrequest and adds a pointer to the data returned in the data stage of a 3-stage Control Write requests
cfiobject
daint_dataThis union represents the bit fields in the Device All EP Interrupt and Mask Registers
dcfg_dataThis union represents the bit fields in the Device Configuration Register
dctl_dataThis union represents the bit fields in the Device Control Register
depctl_dataThis union represents the bit fields in the Device EP Control Register
deptsiz0_dataThis union represents the bit fields in the Device EP 0 Transfer Size Register
deptsiz_dataThis union represents the bit fields in the Device EP Transfer Size Register
dev_dma_desc_stsThis union represents the bit fields in the DMA Descriptor status quadlet
device_grxsts_dataThis union represents the bit fields in the Device Receive Status Read and Pop Registers (GRXSTSR, GRXSTSP) Read the register into the d32 element then read out the bits using the bit elements
diepint_dataThis union represents the bit fields in the Device IN EP Interrupt Register and the Device IN EP Common Mask Register
doepint_dataThis union represents the bit fields in the Device OUT EP Interrupt Registerand Device OUT EP Common Interrupt Mask Register
dsts_dataThis union represents the bit fields in the Device Status Register
dthrctl_dataThis union represents Threshold control Register
  • Read and write the register into the d32 member
dtknq1_dataThis union represents the bit fields in the Device IN Token Queue Read Registers
dtxfsts_dataThis union represents the bit fields in the Transmit FIFO Status Register (DTXFSTS)
dwc_epThe dwc_ep structure represents the state of a single endpoint when acting in device mode
dwc_hcHost channel descriptor
dwc_otg_cil_callbacksDWC_otg CIL callback structure
dwc_otg_core_global_regsDWC_otg Core registers
dwc_otg_core_ifThe dwc_otg_core_if structure contains information needed to manage the DWC_otg controller acting in either host or device mode
dwc_otg_core_paramsThe following parameters may be specified when starting the module
dwc_otg_dev_dma_descDMA Descriptor structure
dwc_otg_dev_global_regsDevice Global Registers
dwc_otg_dev_ifThe dwc_otg_dev_if structure contains information needed to manage the DWC_otg controller acting in device mode
dwc_otg_dev_in_ep_regsDevice Logical IN Endpoint-Specific Registers
dwc_otg_dev_out_ep_regsDevice Logical OUT Endpoint-Specific Registers
dwc_otg_deviceThis structure is a wrapper that encapsulates the driver components used to manage a single DWC_otg controller
dwc_otg_driver_module_params
dwc_otg_hc_regsHost Channel Specific Registers
dwc_otg_hcdThis structure holds the state of the HCD, including the non-periodic and periodic schedules
dwc_otg_hcd::dwc_otg_hcd_internal_flagsInternal DWC HCD Flags
dwc_otg_hcd_function_ops
dwc_otg_hcd_iso_packet_desc
dwc_otg_hcd_pipe_info
dwc_otg_hcd_urb
dwc_otg_host_dma_descHost-mode DMA Descriptor structure
dwc_otg_host_global_regsThe Host Global Registers structure defines the size and relative field offsets for the Host Mode Global Registers
dwc_otg_host_ifOTG Host Interface Structure
dwc_otg_pcdDWC_otg PCD Structure
dwc_otg_pcd_epPCD EP structure
dwc_otg_pcd_function_opsFunction Driver Ops Data Structure
dwc_otg_pcd_requestDWC_otg request structure
dwc_otg_qhA Queue Head (QH) holds the static characteristics of an endpoint and maintains a list of transfers (QTDs) for that endpoint
dwc_otg_qtdA Queue Transfer Descriptor (QTD) holds the state of a bulk, control, interrupt, or isochronous transfer
fifosize_dataThis union represents the bit fields in the FIFO Size Registers (HPTXFSIZ, GNPTXFSIZ, DPTXFSIZn, DIEPTXFn)
gadget_wrapper
gahbcfg_dataThis union represents the bit fields of the Core AHB Configuration Register (GAHBCFG)
gi2cctl_dataThis union represents the bit fields in the I2C Control Register (I2CCTL)
gintmsk_dataThis union represents the bit fields of the Core Interrupt Mask Register (GINTMSK)
gintsts_dataThis union represents the bit fields of the Core Interrupt Register (GINTSTS)
glpmctl_dataThis union represents the bit fields of the Core LPM Configuration Register (GLPMCFG)
gnptxsts_dataThis union represents the bit fields in the Non-Periodic Transmit FIFO/Queue Status Register (GNPTXSTS)
gotgctl_dataThis union represents the bit fields of the Core OTG Control and Status Register (GOTGCTL)
gotgint_dataThis union represents the bit fields of the Core OTG Interrupt Register (GOTGINT)
grstctl_dataThis union represents the bit fields of the Core Reset Register (GRSTCTL)
gusbcfg_dataThis union represents the bit fields of the Core USB Configuration Register (GUSBCFG)
haint_dataThis union represents the bit fields in the Host All Interrupt Register
haintmsk_dataThis union represents the bit fields in the Host All Interrupt Register
hcchar_dataThis union represents the bit fields in the Host Channel Characteristics Register
hcdma_dataThis union represents the bit fields in the Host DMA Address Register used in Descriptor DMA mode
hcfg_dataThis union represents the bit fields in the Host Configuration Register
hcint_dataThis union represents the bit fields in the Host All Interrupt Register
hcintmsk_dataThis union represents the bit fields in the Host Channel Interrupt Mask Register
hcsplt_data
hctsiz_dataThis union represents the bit fields in the Host Channel Transfer Size Register
hfir_dataThis union represents the bit fields in the Host Frame Remaing/Number Register
hfnum_dataThis union represents the bit fields in the Host Frame Remaing/Number Register
host_dma_desc_stsThis union represents the bit fields in the DMA Descriptor status quadlet for host mode
host_grxsts_dataThis union represents the bit fields in the Host Receive Status Read and Pop Registers (GRXSTSR, GRXSTSP) Read the register into the d32 element then read out the bits using the bit elements
hprt0_dataThis union represents the bit fields in the Host Port Control and Status Register
hptxsts_data
hwcfg1_dataThis union represents the bit fields in the User HW Config1 Register
hwcfg2_dataThis union represents the bit fields in the User HW Config2 Register
hwcfg3_dataThis union represents the bit fields in the User HW Config3 Register
hwcfg4_dataThis union represents the bit fields in the User HW Config4 Register
iso_pkt_infoInformation for each ISOC packet
pcgcctl_dataThis union represents the bit fields in the Power and Clock Gating Control Register
wrapper_priv_data
zero_dev

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