_ddma_align_buffer_setup | Descriptor DMA Alignment Buffer setup structure |
_ddma_concat_buffer_setup | Descriptor DMA Concatenation Buffer setup structure |
_ddma_concat_buffer_setup_hdr | Descriptor DMA Concatenation Buffer setup structure |
_ddma_sg_buffer_setup | Descriptor DMA SG Buffer setup structure (SG buffer) |
_rx_fifo_size_setup | Transmit FIFO Size setup structure |
_tx_fifo_size_setup | Transmit FIFO Size setup structure |
cfi_all_features_header | This structure is the header of the Core Features dataset returned to the Host |
cfi_dma_buff | |
cfi_ep | The CFI wrapper of the enabled and activated dwc_otg_pcd_ep structures |
cfi_feature_desc_header | This structure is a header of the Core Feature descriptor dataset returned to the Host after the VEN_CORE_GET_FEATURES request |
cfi_ops | This is the interface for the CFI operations |
cfi_string | This structure describes a NULL terminated string referenced by its id field |
cfi_usb_ctrlrequest | Struct cfi_usb_ctrlrequest - the CFI implementation of the struct usb_ctrlrequest This structure encapsulates the standard usb_ctrlrequest and adds a pointer to the data returned in the data stage of a 3-stage Control Write requests |
cfiobject | |
daint_data | This union represents the bit fields in the Device All EP Interrupt and Mask Registers |
dcfg_data | This union represents the bit fields in the Device Configuration Register |
dctl_data | This union represents the bit fields in the Device Control Register |
depctl_data | This union represents the bit fields in the Device EP Control Register |
deptsiz0_data | This union represents the bit fields in the Device EP 0 Transfer Size Register |
deptsiz_data | This union represents the bit fields in the Device EP Transfer Size Register |
dev_dma_desc_sts | This union represents the bit fields in the DMA Descriptor status quadlet |
device_grxsts_data | This union represents the bit fields in the Device Receive Status Read and Pop Registers (GRXSTSR, GRXSTSP) Read the register into the d32 element then read out the bits using the bit elements |
diepint_data | This union represents the bit fields in the Device IN EP Interrupt Register and the Device IN EP Common Mask Register |
doepint_data | This union represents the bit fields in the Device OUT EP Interrupt Registerand Device OUT EP Common Interrupt Mask Register |
dsts_data | This union represents the bit fields in the Device Status Register |
dthrctl_data | This union represents Threshold control Register
- Read and write the register into the d32 member
|
dtknq1_data | This union represents the bit fields in the Device IN Token Queue Read Registers |
dtxfsts_data | This union represents the bit fields in the Transmit FIFO Status Register (DTXFSTS) |
dwc_ep | The dwc_ep structure represents the state of a single endpoint when acting in device mode |
dwc_hc | Host channel descriptor |
dwc_otg_cil_callbacks | DWC_otg CIL callback structure |
dwc_otg_core_global_regs | DWC_otg Core registers |
dwc_otg_core_if | The dwc_otg_core_if structure contains information needed to manage the DWC_otg controller acting in either host or device mode |
dwc_otg_core_params | The following parameters may be specified when starting the module |
dwc_otg_dev_dma_desc | DMA Descriptor structure |
dwc_otg_dev_global_regs | Device Global Registers |
dwc_otg_dev_if | The dwc_otg_dev_if structure contains information needed to manage the DWC_otg controller acting in device mode |
dwc_otg_dev_in_ep_regs | Device Logical IN Endpoint-Specific Registers |
dwc_otg_dev_out_ep_regs | Device Logical OUT Endpoint-Specific Registers |
dwc_otg_device | This structure is a wrapper that encapsulates the driver components used to manage a single DWC_otg controller |
dwc_otg_driver_module_params | |
dwc_otg_hc_regs | Host Channel Specific Registers |
dwc_otg_hcd | This structure holds the state of the HCD, including the non-periodic and periodic schedules |
dwc_otg_hcd::dwc_otg_hcd_internal_flags | Internal DWC HCD Flags |
dwc_otg_hcd_function_ops | |
dwc_otg_hcd_iso_packet_desc | |
dwc_otg_hcd_pipe_info | |
dwc_otg_hcd_urb | |
dwc_otg_host_dma_desc | Host-mode DMA Descriptor structure |
dwc_otg_host_global_regs | The Host Global Registers structure defines the size and relative field offsets for the Host Mode Global Registers |
dwc_otg_host_if | OTG Host Interface Structure |
dwc_otg_pcd | DWC_otg PCD Structure |
dwc_otg_pcd_ep | PCD EP structure |
dwc_otg_pcd_function_ops | Function Driver Ops Data Structure |
dwc_otg_pcd_request | DWC_otg request structure |
dwc_otg_qh | A Queue Head (QH) holds the static characteristics of an endpoint and maintains a list of transfers (QTDs) for that endpoint |
dwc_otg_qtd | A Queue Transfer Descriptor (QTD) holds the state of a bulk, control, interrupt, or isochronous transfer |
fifosize_data | This union represents the bit fields in the FIFO Size Registers (HPTXFSIZ, GNPTXFSIZ, DPTXFSIZn, DIEPTXFn) |
gadget_wrapper | |
gahbcfg_data | This union represents the bit fields of the Core AHB Configuration Register (GAHBCFG) |
gi2cctl_data | This union represents the bit fields in the I2C Control Register (I2CCTL) |
gintmsk_data | This union represents the bit fields of the Core Interrupt Mask Register (GINTMSK) |
gintsts_data | This union represents the bit fields of the Core Interrupt Register (GINTSTS) |
glpmctl_data | This union represents the bit fields of the Core LPM Configuration Register (GLPMCFG) |
gnptxsts_data | This union represents the bit fields in the Non-Periodic Transmit FIFO/Queue Status Register (GNPTXSTS) |
gotgctl_data | This union represents the bit fields of the Core OTG Control and Status Register (GOTGCTL) |
gotgint_data | This union represents the bit fields of the Core OTG Interrupt Register (GOTGINT) |
grstctl_data | This union represents the bit fields of the Core Reset Register (GRSTCTL) |
gusbcfg_data | This union represents the bit fields of the Core USB Configuration Register (GUSBCFG) |
haint_data | This union represents the bit fields in the Host All Interrupt Register |
haintmsk_data | This union represents the bit fields in the Host All Interrupt Register |
hcchar_data | This union represents the bit fields in the Host Channel Characteristics Register |
hcdma_data | This union represents the bit fields in the Host DMA Address Register used in Descriptor DMA mode |
hcfg_data | This union represents the bit fields in the Host Configuration Register |
hcint_data | This union represents the bit fields in the Host All Interrupt Register |
hcintmsk_data | This union represents the bit fields in the Host Channel Interrupt Mask Register |
hcsplt_data | |
hctsiz_data | This union represents the bit fields in the Host Channel Transfer Size Register |
hfir_data | This union represents the bit fields in the Host Frame Remaing/Number Register |
hfnum_data | This union represents the bit fields in the Host Frame Remaing/Number Register |
host_dma_desc_sts | This union represents the bit fields in the DMA Descriptor status quadlet for host mode |
host_grxsts_data | This union represents the bit fields in the Host Receive Status Read and Pop Registers (GRXSTSR, GRXSTSP) Read the register into the d32 element then read out the bits using the bit elements |
hprt0_data | This union represents the bit fields in the Host Port Control and Status Register |
hptxsts_data | |
hwcfg1_data | This union represents the bit fields in the User HW Config1 Register |
hwcfg2_data | This union represents the bit fields in the User HW Config2 Register |
hwcfg3_data | This union represents the bit fields in the User HW Config3 Register |
hwcfg4_data | This union represents the bit fields in the User HW Config4 Register |
iso_pkt_info | Information for each ISOC packet |
pcgcctl_data | This union represents the bit fields in the Power and Clock Gating Control Register |
wrapper_priv_data | |
zero_dev | |