#include <dwc_otg_regs.h>
Data Fields | |
| uint32_t | d32 |
| raw register data | |
| struct { | |
| unsigned mps:11 | |
| Maximum Packet Size IN/OUT EPn IN/OUT EP0 - 2 bits 2'b00: 64 Bytes 2'b01: 32 2'b10: 16 2'b11: 8. | |
| unsigned nextep:4 | |
| Next Endpoint IN EPn/IN EP0 OUT EPn/OUT EP0 - reserved. | |
| unsigned usbactep:1 | |
| USB Active Endpoint. | |
| unsigned dpid:1 | |
| Endpoint DPID (INTR/Bulk IN and OUT endpoints) This field contains the PID of the packet going to be received or transmitted on this endpoint. | |
| unsigned naksts:1 | |
| NAK Status. | |
| unsigned eptype:2 | |
| Endpoint Type 2'b00: Control 2'b01: Isochronous 2'b10: Bulk 2'b11: Interrupt. | |
| unsigned snp:1 | |
| Snoop Mode OUT EPn/OUT EP0 IN EPn/IN EP0 - reserved. | |
| unsigned stall:1 | |
| Stall Handshake. | |
| unsigned txfnum:4 | |
| Tx Fifo Number IN EPn/IN EP0 OUT EPn/OUT EP0 - reserved. | |
| unsigned cnak:1 | |
| Clear NAK. | |
| unsigned snak:1 | |
| Set NAK. | |
| unsigned setd0pid:1 | |
| Set DATA0 PID (INTR/Bulk IN and OUT endpoints) Writing to this field sets the Endpoint DPID (DPID) field in this register to DATA0. | |
| unsigned setd1pid:1 | |
| Set DATA1 PID (INTR/Bulk IN and OUT endpoints) Writing to this field sets the Endpoint DPID (DPID) field in this register to DATA1 Set Odd (micro)frame (SetOddFr) (ISO IN and OUT Endpoints) Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to odd (micro) frame. | |
| unsigned epdis:1 | |
| Endpoint Disable. | |
| unsigned epena:1 | |
| Endpoint Enable. | |
| } | b |
| register bits | |
Read the register into the d32 member then set/clear the bits using the bit elements.
Definition at line 1304 of file dwc_otg_regs.h.
| unsigned depctl_data::dpid |
Endpoint DPID (INTR/Bulk IN and OUT endpoints) This field contains the PID of the packet going to be received or transmitted on this endpoint.
The application should program the PID of the first packet going to be received or transmitted on this endpoint , after the endpoint is activated. Application use the SetD1PID and SetD0PID fields of this register to program either D0 or D1 PID.
The encoding for this field is
Definition at line 1344 of file dwc_otg_regs.h.
| unsigned depctl_data::setd0pid |
Set DATA0 PID (INTR/Bulk IN and OUT endpoints) Writing to this field sets the Endpoint DPID (DPID) field in this register to DATA0.
Set Even (micro)frame (SetEvenFr) (ISO IN and OUT Endpoints) Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to even (micro) frame.
Definition at line 1381 of file dwc_otg_regs.h.
1.4.7