#include <dwc_otg_regs.h>
Data Fields | |
| uint32_t | d32 |
| raw register data | |
| struct { | |
| unsigned devspd:2 | |
| Device Speed. | |
| unsigned nzstsouthshk:1 | |
| Non Zero Length Status OUT Handshake. | |
| unsigned reserved3:1 | |
| unsigned devaddr:7 | |
| Device Addresses. | |
| unsigned perfrint:2 | |
| Periodic Frame Interval. | |
| unsigned reserved13_17:5 | |
| unsigned epmscnt:5 | |
| In Endpoint Mis-match count. | |
| unsigned descdma:1 | |
| Enable Descriptor DMA in Device mode. | |
| } | b |
| register bits | |
Read the register into the d32 member then set/clear the bits using the bit elements. Write the d32 member to the dcfg register.
Definition at line 923 of file dwc_otg_regs.h.
1.4.7