#include <dwc_otg_regs.h>
Data Fields | |
| uint32_t | d32 |
| raw register data | |
| struct { | |
| unsigned stoppclk:1 | |
| Stop Pclk. | |
| unsigned gatehclk:1 | |
| Gate Hclk. | |
| unsigned pwrclmp:1 | |
| Power Clamp. | |
| unsigned rstpdwnmodule:1 | |
| Reset Power Down Modules. | |
| unsigned physuspended:1 | |
| PHY Suspended. | |
| unsigned enbl_sleep_gating:1 | |
| Enable Sleep Clock Gating (Enbl_L1Gating). | |
| unsigned phy_in_sleep:1 | |
| PHY In Sleep (PhySleep). | |
| unsigned deep_sleep:1 | |
| Deep Sleep. | |
| unsigned reserved31_8:24 | |
| } | b |
| register bits | |
Read the register into the d32 member then set/clear the bits using the bit elements.
Definition at line 2210 of file dwc_otg_regs.h.
1.4.7