#include <dwc_otg_regs.h>
Data Fields | |
volatile uint32_t | hcfg |
Host Configuration Register. | |
volatile uint32_t | hfir |
Host Frame Interval Register. | |
volatile uint32_t | hfnum |
Host Frame Number / Frame Remaining Register. | |
uint32_t | reserved40C |
Reserved. | |
volatile uint32_t | hptxsts |
Host Periodic Transmit FIFO/ Queue Status Register. | |
volatile uint32_t | haint |
Host All Channels Interrupt Register. | |
volatile uint32_t | haintmsk |
Host All Channels Interrupt Mask Register. | |
volatile uint32_t | hflbaddr |
Host Frame List Base Address Register . |
Host Global Registers offsets 400h-7FFh.
Definition at line 1627 of file dwc_otg_regs.h.
volatile uint32_t dwc_otg_host_global_regs::hcfg |
volatile uint32_t dwc_otg_host_global_regs::hfir |
volatile uint32_t dwc_otg_host_global_regs::hfnum |
Host Frame Number / Frame Remaining Register.
Offset: 408h
Definition at line 1633 of file dwc_otg_regs.h.
volatile uint32_t dwc_otg_host_global_regs::hptxsts |
Host Periodic Transmit FIFO/ Queue Status Register.
Offset: 410h
Definition at line 1637 of file dwc_otg_regs.h.
volatile uint32_t dwc_otg_host_global_regs::haint |
volatile uint32_t dwc_otg_host_global_regs::haintmsk |
Host All Channels Interrupt Mask Register.
Offset: 418h
Definition at line 1641 of file dwc_otg_regs.h.
volatile uint32_t dwc_otg_host_global_regs::hflbaddr |
Host Frame List Base Address Register .
Offset: 41Ch
Definition at line 1643 of file dwc_otg_regs.h.