#include <dwc_otg_regs.h>
Data Fields | |
uint32_t | d32 |
raw register data | |
struct { | |
unsigned n_bytes: 17 | |
Number of bytes. | |
unsigned qtd_offset: 6 | |
QTD offset to jump when Short Packet received - only for IN EPs. | |
unsigned a_qtd: 1 | |
Set to request the core to jump to alternate QTD if Short Packet received - only for IN EPs. | |
unsigned sup: 1 | |
Setup Packet bit. | |
unsigned ioc: 1 | |
Interrupt On Complete. | |
unsigned eol: 1 | |
End of List. | |
unsigned reserved27: 1 | |
unsigned sts: 2 | |
Rx/Tx Status. | |
unsigned reserved30: 1 | |
unsigned a: 1 | |
Active Bit. | |
} | b |
quadlet bits | |
struct { | |
unsigned n_bytes: 12 | |
Number of bytes. | |
unsigned reserved12_24: 13 | |
unsigned ioc: 1 | |
Interrupt On Complete. | |
unsigned reserved26_27: 2 | |
unsigned sts: 2 | |
Rx/Tx Status. | |
unsigned reserved30: 1 | |
unsigned a: 1 | |
Active Bit. | |
} | b_isoc |
Read the quadlet into the d32 member then set/clear the bits using the bit elements.
Definition at line 2106 of file dwc_otg_regs.h.
unsigned host_dma_desc_sts::sup |
Setup Packet bit.
When set indicates that buffer contains setup packet.
Definition at line 2127 of file dwc_otg_regs.h.