#include <dwc_otg_regs.h>
Data Fields | |
| uint32_t | d32 |
| raw register data | |
| struct { | |
| unsigned bytes:16 | |
| Received number of bytes. | |
| unsigned reserved16_22:7 | |
| unsigned mtrf:1 | |
| Multiple Transfer - only for OUT EPs. | |
| unsigned sr:1 | |
| Setup Packet received - only for OUT EPs. | |
| unsigned ioc:1 | |
| Interrupt On Complete. | |
| unsigned sp:1 | |
| Short Packet. | |
| unsigned l:1 | |
| Last. | |
| unsigned sts:2 | |
| Receive Status. | |
| unsigned bs:2 | |
| Buffer Status. | |
| } | b |
| quadlet bits | |
| struct { | |
| unsigned rxbytes:11 | |
| Received number of bytes. | |
| unsigned reserved11:1 | |
| unsigned framenum:11 | |
| Frame Number. | |
| unsigned pid:2 | |
| Received ISO Data PID. | |
| unsigned ioc:1 | |
| Interrupt On Complete. | |
| unsigned sp:1 | |
| Short Packet. | |
| unsigned l:1 | |
| Last. | |
| unsigned rxsts:2 | |
| Receive Status. | |
| unsigned bs:2 | |
| Buffer Status. | |
| } | b_iso_out |
| iso out quadlet bits | |
| struct { | |
| unsigned txbytes:12 | |
| Transmited number of bytes. | |
| unsigned framenum:11 | |
| Frame Number. | |
| unsigned pid:2 | |
| Transmited ISO Data PID. | |
| unsigned ioc:1 | |
| Interrupt On Complete. | |
| unsigned sp:1 | |
| Short Packet. | |
| unsigned l:1 | |
| Last. | |
| unsigned txsts:2 | |
| Transmit Status. | |
| unsigned bs:2 | |
| Buffer Status. | |
| } | b_iso_in |
| iso in quadlet bits | |
Read the quadlet into the d32 member then set/clear the bits using the bit, b_iso_out and b_iso_in elements.
Definition at line 1466 of file dwc_otg_regs.h.
1.4.7