Technical reports
Computer Laboratory technical reports
The Computer Laboratory has published a Technical Report series (ISSN 1476-2986) since 1974. Technical reports are intended primarily for the long-term archival of results and descriptions that are not suitable for publication elsewhere, due to their length or nature. Technical reports are also the most common way to make a Computer Laboratory PhD thesis widely available.
Most newer technical reports, in particular all published since 2002, are available online in PDF. Older reports can be scanned in on request (please contact our librarian).
Catalogue metadata
The metadata in our Technical Report database is also available in various human- or machine-readable formats:
- HTML table with links to HTML abstracts and PDF fulltext
- Authors index
- PDF catalogue with abstracts
- BibTeX (info)
- Open Archives Initiative static repository and PMH gateway base URL (info)
- Simple Dublin Core in RDF/XML (info)
- DBLP XML (info)
- RFC 1807 (info)
- RSS (info)
- the original self-documenting database and abstracts files
Recent additions
- Machine learning methods for detecting structure in metabolic flow networks
- Honeypots in the age of universal attacks and the Internet of Things
- Latency-First datacenter network scheduling
- Evaluating visually grounded language capabilities using microworlds
- An Introduction to CHERI
- Rigorous engineering for hardware security: formal modelling and proof in the CHERI design and implementation process
- Effects of timing on users’ perceived control when interacting with intelligent systems
- Automatic annotation of error types for grammatical error correction
- Latency-driven performance in data centres
- High-performance memory safety: optimizing the CHERI capability machine
- Distributed consensus revised
- Exploitation from malicious PCI Express peripherals
- An Evaluation of NDP performance
- CheriABI: Enforcing valid pointer provenance and minimizing pointer privilege in the POSIX C run-time environment
- A Performance-efficient and practical processor error recovery framework