Technical reports
Computer Laboratory technical reports
The Department of Computer Science and Technology (formerly the Computer Laboratory) has published a Technical Report series (ISSN 1476-2986) since 1974. Technical reports are intended primarily for the long-term archival of results and descriptions that are not suitable for publication elsewhere, due to their length or nature. Technical reports are also a common way to make a departmental PhD thesis widely available.
Most newer technical reports, in particular all published since 2002, are available online in PDF. Older reports can be scanned on request (please contact the technical report series editor).
Catalogue metadata
The metadata in our Technical Report database is also available in various human- or machine-readable formats:
- HTML table with links to HTML abstracts and PDF fulltext
- Authors index
- PDF catalogue with abstracts
- BibTeX (info)
- Open Archives Initiative static repository and PMH gateway base URL (info)
- Simple Dublin Core in RDF/XML (info)
- DBLP XML (info)
- RFC 1807 (info)
- RSS (info)
- the original self-documenting database and abstracts files, and some notes about our setup
Series identifiers: OpenDOAR record, ISSN record (print)
Recent additions
- CHERI-SIMT report: implementing capability memory protection in GPGPUs
- It is time to standardize principles and practices for software memory safety (extended version)
- Fragment-template power-analysis attacks against microcontroller implementations of the 32-bit stream cipher ChaCha
- Deception and defense from machine learning to supply chains
- Distributional and relational inductive biases for graph representation learning in biomedicine
- Transient execution vulnerabilities in the security context of server hardware
- Porting a mix network client to mobile
- Probing the foundations of neural algorithmic reasoning
- Balanced allocations under incomplete information: New settings and techniques
- CHERI C semantics as an extension of the ISO C17 standard
- Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 9)
- Early performance results from the prototype Morello microarchitecture
- Scalable agent-based models for optimized policy design: applications to the economics of biodiversity and carbon
- Efficient spatial and temporal safety for microcontrollers and application-class processors
- An evaluation of police interventions for cybercrime prevention