Course material 2010–11

Advanced Computer Design

Principal lecturer: Dr Simon Moore
Taken by: MPhil ACS
Syllabus

Prerequisites

• Chip Multiprocessors
• Some training in VHDL or Verilog HDL and computer architecture (use the Cambridge SystemVerilog Tutor if you need a refresher))

Structure

8 lectures + 8 practicals arranged in a single flexible 3 hour slot per week. Lecture notes will be handed out at the beginning of each lecture or group of lectures.

Aims

This module aims to provide an understanding of multithreaded multiprocessor architecture research using FPGAs as an emulation platform.

Syllabus

Introduction to Bluespec hardware description language (2L+1P)

Implementing a RISC processor in Bluespec (2L+1P)

Timing critical circuits and bus interfacing (1L+1P)

On-chip networks: implementation and analysis (1L+1P)

FPGA processor emulation techniques and a comparison with software simulation (2L+1P)

Analysis of multiprocessor designs (3P)

Objectives

On completion of this module students should:

• Understand how to design and implement a multiprocessor system
• Appreciate how to instrument a design to obtain research results
• Understand how to design using Bluespec
• Appreciate the pros and cons of using FPGA emulation vs. software simulation

Coursework

Complete the laboratory material and submit a portfolio of work.

Write a 10 page research paper including results from a computer architecture study based on the practical component of the course.

Further resources

The web based material for this course is provided a wiki: http://www.wiki.cl.cam.ac.uk/rowiki/CompArch/ACS-ACD-2011

Various of the Bluespec design examples have also been packaged up and made generally available here: http://www.cl.cam.ac.uk/~swm11/examples/bluespec/

Ensure you know something about hardware description languages before you start using the Cambridge SystemVerilog Tutor