Computer Laboratory

Computer Architecture Group


Members of the Computer Architecture Group

Academic staff and Fellows

  • Simon Moore
    Massively parallel and secure computer design
  • Robert Mullins
    On-chip interconnection networks, multi-core processors and software programmable processing fabrics, novel approaches to system-timing.
  • Timothy Jones
    Compilation and microarchitectural techniques for reliability, power saving and automatic parallelisation.
  • Robert Watson
    Operating system security, capability systems, multi-processor network stacks, CPU security models, the hardware-software interface.
  • Andrew Moore
    Novel interconnect and network architectures incorporating photonics.
  • David Greaves
    System specification, hardware and software synthesis. General and home networking. Reliable scripting and embedded systems. Compilers for parallel architectures.
  • Alan Mycroft
    Languages and compilers, semantics and reasoning for fine-grain concurrency, program analysis and compilation techniques applied to hardware.

Post-doctoral Researchers

Research students

Recent Alumni

  • Arnab Banerjee
    Worked on Communication Flows in Power-Efficient Networks-on-Chips. [Technical Report] Imagination Technologies, UltraSoC, nVidia.
  • Alban Rrustemi
    Worked on dense wired sensor networks. [Technical Report] Cofounded fonleap.
  • Matthew Johnson
    Worked on security of consumer security devices for internet banking [Technical Report]
  • Ian Caulfield
    Worked on complexity-effective superscalar embedded processors usint instruction-level distributed processing [Technical Report] , now at ARM.
  • Simon (Harry) Hollis
    Worked on pulse-base on-chip interconnect [Technical Report], now a Lecturer at Univ. of Bristol
  • Jacques Fournier
    Worked on vector microprocessors for cyptography [Technical Report]. Gemalto then EMSE, France.
  • Petros Oikonomakos
    Worked as an RA on consumer security devices. Now at Nokia.
  • Jeong-Gun Lee
    Was a visiting research fellow working on asynchronous networks on chip.
  • Kate Taylor
    Worked as a Teaching Associate on the Intelligent Verilog Compiler
  • Huiyun Li
    Worked on design time security validation [Technical Report]
  • Scott Fairbanks
    Worked on mixing clocked and self-timed circuit techniques. [Technical Report]
  • Simon Frankau
    Worked on a high level functional hardware description language with stream processing features [Technical Report]
  • Panit Watcharawitch
    Worked on embedded multithreaded processors [Technical Report]
  • Daniel Gordon
    Was a Senior Research Associate on CODEX teaching project, now at RealVNC
  • George Taylor
    Was a Senior Research Associate working on the GALS project, but had interests in other projects. He also lectured ECAD from time to time. Now at Azuro.