Department of Computer Science and Technology

Dr. D J Greaves.

Contact details: D J Greaves, MA, PhD, MIET.

Short (auto-)biography: Sep 07
Further photos: A, B, C, D.

David is a Senior Lecturer in Computing Science at the Computer Laboratory and a Fellow of Corpus Christi College .

Consult Google regarding:

Relevant research groups:     Systems Research Group,     Computer Architecture Group,     Programming Research Group,

David Greaves, PhD, MIET, is a University Senior Lecturer interested in compiler and hardware design. He has considerable industrial experience at the CTO/Chief Scientist level and has led the design of many hardware systems, including semi-custom VLSI design.

DJG Summer 2021 textbook on Amazon: Arm Modern SoC Design ISBN 978-1-911531-36-4 Title Pages (or download PDF free from Arm).

Lecture Notes: System On Chip Design and Modelling (PDF).     BIGGER PDF.

Major Achievements From Past Decades:

Please click: PROTO MEMOIRS.

Current Activities:

Quote of the day: 'Although there is no accepted taxonomy of high versus low-level languages for hardware design, we can roughly relate a gate-level net list to machine code, RTL to assembly language, hardware construction languages such as Chisel and Lava as low-level languages and anything that makes automatic assignment of work to clock cycles as high-level languages.' --- DJ Greaves.

New PhD Students

I am expecting to take at most one new PhD student a year in the area of special-purpose or unusual compiler tools, especially those generating hardware or parallel implementations of a high-level work description.

Future Activities:

  • IP block machine-readable datasheets for incremental HLS and verification: CARDs proposal.

  • A new System-Level Description Language (SLDL) for EDA, including the best parts of the H2 temporary language.

  • Draft items, yet to be published: LINK.


Older Research Areas     Conference Program Committees     Recent Publications     Unpublished Drafts     Minor Research Notes     Phd Students     Undergraduate Teaching     Miscellaneous Projects     System Design Methodology

External Affiliations

DJG is a Subject Editor of IET Electronics Letters. DJG is external examiner at Imperial College, Dept of Electrical and Electronic Engineering.