Dr. D J Greaves: Minor Research Notes.

Minor Research Notes and Pages

This is my own bloggsite, so not everything (anything even) is groundbreaking in this section...

  • MicroCode Formal Equivalence Checking (PIC Processors).

  • RTL Serdes Source Code: Serialiser/Deserialiser pair. Includes many classical paradigms: Centre of eye detection using oversampling, NRZI encoding for polarity insensitivity, frame alignment using an embedded pattern, self-synchronous scrambling. a href="simple-serdes.txt">Verilog RTL implementation of a SERDES pair.

  • Burrows-Wheeler String Search coded in C#.

  • Tombstone Diagrams. Compiler Tombstone Diagrams

  • Notes on digital CD mastering techniques.

  • Greaves Algorithm for Custom VLIW Synthesis (gif)

  • Dining Philosophers in Bluespec Verilog.

  • Toy Bluespec Verilog Compiler implemented in F Sharp F#.

    Studio Wiring and Earth Loops.

    Mixerton Deadly Quiet PC Power Supply (PSU).

    Mixerton HiFi Amplifier Balanced Input Addition.

  • TNDJG:0004: I converted my processor design to Bluespec and it went more than twice as fast!

  • How Computers Work for the Sutton Trust Summer School (several times voted the most popular talk!).

  • Mixerton PU17 Microprocessor.

  • Common Temporal Logic Constructs.

  • Abstract Programming in Declo-Perative Languages.

  • Direct Synthesis of Logic Research Note.

  • Operator Precedence Parser (dual stack) in SML.

  • A toy Prolog Interpreter in SML.

  • A toy u-calculus automated theorem prover in SML.

  • A toy EDA style Event Driven Simulator in SML MOSML.

  • Model Checker Magic.

  • Booth's multiplier algorithm in SML.

  • Reduced Ordered Binary Decision Diagram OBDD in SML.

  • Revision notes on the four-phase hardware handshake: HERE.

  • Model Checking a FIFO Queue and LIFO Stack.

  • Orangepath HPRLS.

    Other Miscellaneous Research Notes