Orangepath/HPR-L/S Project: Hardware and Embedded Software Synthesis from Executable Specifications.
Kiwic .net Compilation to Hardware.

Kiwi: Acclerating Data-Intensive Applications Using Networked FPGA


A data-intensive application is coded in C# and can be developed and tested on the user's workstation using Visual Studio or Mono.

When high performance is required, the self-same binary file is further compiled using Kiwi for programmable hardware FPGAs.

FPGAs can use as little as 1/1000th of the energy and run 100 times faster than standard workstations. The FPGAs can stream big data from and to fileservers.

In the future, FPGA platforms may become a standard offering in Cloud Computing.

Kiwi was developed at the University of Cambridge Computer Laboratory and Microsoft Research Limited, headed by David Greaves (UoCCL) and Satnam Singh (MRL).

Kiwi is undertaken at the Computer Laboratory as part of a logic synthesis project called HPR L/S and it uses the Orangepath core library.

Kiwi is a form of acceleration for scientific applications and parallel programming. It uses the parallel constructs of the C# language and dotnet runtime. Specifically, Kiwi consists of a run-time library for native simulation of hardware descriptions within C# and the KiwiC compiler that generates RTL for FPGA from constrained/stylised .net bytecode.

Or in other words: Kiwi is developing a methodology for algorithm acceleration using parallel programming and the C# language. Specifically, Kiwi consists of a run-time library for hardware FPGA execution of algorithms expressed within C# and a compiler, KiwiC, that converts dotnet bytecode into Verilog RTL for further compilation for FPGA execution. In the future, custom domain-specific front ends that generate dotnet bytecode can be used.

The Kiwi technology has many potential uses, but some of note are:

Compared with existing high-level synthesis tools, KiwiC supports a wider subset of standard programming language features. In particular, it supports multi-dimensional arrays, threading, file-server I/O, object management and limited recursion. Release 1 of KiwiC supports static heap management, where all memory structures are allocated at compile-time and permanently allocated to on-FPGA RAM or external DRAM. Release 2 of KiwiC, which has had some successful tests already, supports arbitrary heap-allocation at run time but does not implement garbage collection.

The Kiwi performance predictor is another important design tool, enabling HPC users to explore the expected speed up of their application as the modify it, without having to wait for multi-hour FPGA compilations in each development iteration.

This web page summarises various KiwiC examples and uses. HPC-focussed work will be presented here: Kiwi Scientific Acceleration: New Site for Scientific Users: Kiwi HPC.

Online Resources

  • Early demonstrations: Demo Pages.

  • Kiwi Scientific Acceleration Manual - (draft form): PDF, HTML.

  • Kiwi Scientific Acceleration: New Site: Larger Demos for Scientific Users (under development 2Q16).

  • KiwiC shares a lot of internal implementation with the H2 compiler: PDF, HTML.
    (C) 2007-2016 David J Greaves.