Course pages 2014–15

System-on-Chip Design

This year the order of the lectures has been reversed from previous years. Also the running example presented in lectures is greatly cut down since SystemC will be lectured towards the end.

Primary Resources

Slightly edited lecture notes PDF-r1a.

(As printed and handed out, lecture notes PDF-r1).

Slide Pack 1 SP1 SLIDES (SoC Parts).

Slide Pack 2 SP2 SLIDES (Busses and Partition).

Slide Pack 3 SP3 SLIDES (Energy and Power).

Slide Pack 4 SP4 SLIDES (HDL, RTL, Hazards).

Slide Pack 5 SP5 SLIDES (Assertion Based Design).

Slide Pack 6 SP6 SLIDES SystemC and ESL Modelling.

Exercises and Examples Sheets

These sheets will be extended as the course is lectured.

• Quick Exercise Sheet for SP1 and SP2 PDF.

• Longer Exercise Sheet for SP1: PDF.

• Longer Exercise Sheet for SP2: PDF.

• Longer Exercise Sheet for SP3: PDF.

• Longer and Short Exercise Sheet for SP4 (RTL): PDF.

• Exercise Sheet for SP5 (ABD): PDF.

• Exercise Sheet for SP6 (SystemC/TLM): PDF.

Further Books

Embedded Systems Hardware for Software Engineers Ed Lipiansky. McGraw-Hill Professional (1 Feb. 2012)

Mishra K. (2014) Advanced Chip Design - Practial Examples in Verilog. Pub Amazon Martson Gate.

Secondary Resources

Two System On Chip simulation environments

Two SystemC practical systems are available to look at.

The first is very short and well worth a look.
SystemC GET STARTED and
TOY ESL CLASSES.

The second is complex and requires considerable C++ expertise to compile and run - djg11 will give you bitbucket access if you pass on your bitbucket user name. PRAZOR/VHLS.

Documents

Further reading documents are on last year's page OLDER. (Note that the order of lectures was the other way around last year.)