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Part II CST SoC D/M Slide Pack 6 (SYSC/ESL)
SystemC: Hardware Modelling Library
SystemC: Hardware Modelling Library for C++
Example (Counter)
SystemC Structural Netlist
SystemC Channels and Signals
SystemC Abstracted Data Modelling
Threads and Methods
Example using an SC_THREAD
Blocking and Eventing
SystemC Plotting and GUI
ESL: Electronic System Level Modelling
ESL Flow Model: Avoiding ISS/RTL overheads using native calls.
Using C Preprocessor to Adapt Firmware
Transactional Level Modelling (TLM)
General ESL Interactions with Shortcuts Illustrated
Example Protocol: 4/P Handshake at net-level and TLM level.
Mixing modelling styles: 4/P net-level to TLM transactors.
Transactor Configurations
ESL TLM in SystemC: First Standard TLM 1.0.
TLM 1.0 Form Example.
TLM 2.0 - Tiny Example - Memory SRAM Model
Timed Transactions: Adding delays to TLM calls.
TLM Modelling: Adding Approximate Timing Annotations
Instruction Set Simulator (ISS)
Typical ISS setup with Loose Timing (Temporal Decoupling)
RTL Power Estimation Without Simulation
Typical macroscopic performance equations: SRAM example.
RTL Operating Frequency and Power Estimation
Gold standard: Power Estimation using Simulation Post Layout
Rent's Rule Estimate of Wire Length
Macroscopic Phase/Mode Power Estimation Formula
Transactional Energy Modelling