Part II CST SoC D/M Slide Pack 8 (High-Level Synthesis)
High-level Design Capture and Synthesis
Spirit IP XACT
IP XACT Tool Flow
Higher-level: Behavioural or Declarative ?
Classical High-Level Synthesis
Behavioural Expression using Threads
Declarative Design using Atomic Actions
Beyond Pure RTL: Behavioural descriptions of hardware.
More-advanced behavioural specification:
Static and Dynamic Scheduling
Synopsys Behavioural Compiler
Shortcomings of Verilog and VHDL (for H/L Synthesis).
Motivations to do better.
H/W Synthesis from C and other Programming Languages.
Kiwi : Compiling Concurrent Programs to Hardware
State charts and Graphical `languages'
Behavioural H/L Synthesis Summary
Synthesis from Declarative Specifications
Synthesis from Formal Specification
Synthesis/Refinement from Formal Specifications
Synthesis from Rules (SAT-based idea).
Rule-based hardware generation (BlueSpec)
Synthesis from Cross-Product (Greaves/Nam).
Synthesis from Cross-Product: Tool Flow:
High-level Synthesis Summary