Behavioural H/L Synthesis Summary

Logic synthesisers and HLS tools cannot synthesise into hardware the full set of constructs of a general programming language. There are inevitable problems with:

• unbounded recursive functions,
• unbounded heap use
• other sources of unbounded numbers of state variables,
• many library functions: access to file or screen I/O.

Generating good hardware requires global optimisation of the major resources (ALUs, Multipliers and Memory Ports) and hence automatic time/space folding.

New techniques are needed that note that wiring is a dominant power consumer in today's ASICs