Computer Laboratory

Verilog Tutor - The Intelligent Verilog Compiler Project

The Intelligent Verilog Compiler (IVC) research was undertaken with RA (Kate Taylor). It provides an interactive web based teaching system for the Verilog hardware discription language. This was trialed in October 2005 for 2nd year students at the Computer Laboratory and provided the background to enable them to complete the ECAD laboratory sessions. For further details, see a paper about IVC published in 2005.