ECAD and Architecture Practical Classes

Tick 4 - RISC-V performance analysis

Simulate your divider code on Clarvi for the following division: 32/3. On Moodle, submit the simulation trace and write a short report containing answers to the following questions:

1. The number of CPU clock cycles required to complete the division of 32/3 using your divider assembler code. Exclude any time in main and only provide the number of cycles running the code in div.s
2. How may pipeline bubbles (dead cycles when no useful work is done) occur just in your divider code?
3. What instructions cause the bubbles?
4. How could your assembler code be improved to reduce the number of bubbles?

Note that this report and your trace will be reviewed by one of the demonstrators and a short meeting will be arranged to discuss your answers before the tick is given.