Course pages 2017–18

System-on-Chip Design

Primary Materials

Main Lecture Notes Handout

The lecture notes were given out in three PDF files: the first covers Knowledge Groups 1-3, 4, and 5-6.

All lecture notes in one document (with minor corrections and additional explanations) PDF 140 PAGES.

Printed: First half Lecture Notes, kg1-3: 54 Pages PDF.

Printed: RTL Lecture Notes, kg4: 35 Pages PDF.

Printed: HLS and ESL Lecture Notes: kg5-6: 49 Pages PDF.

Presentation Slides used in Lectures

Six so-called Knowledge Groups

• (KG0) Introduction.

• (KG1) Energy use in Digital Hardware.

• (KG2) Masked versus Reconfigurable Technology & Computing.

• (KG3) Custom Accelerator Structures.

• (KG4) Interfaces, RTL, Pipelining and Hazards.

• (KG5) High-level Design Capture and Synthesis.

• (KG6) Architectural Exploration using ESL Modelling.

Not Lectured and Not Examinable Material

Some of the HLS and much of the ESL material was not lectured this year. Various slides throughout the slide pack are marked as non-examinable. In addition, the following specific topics were not lectured this year: Delta cycles, Verilog-AMS, Chisel HCL and the final section of the HLS slides regarding alternative models of computation, TLM Modelling of Centention, IP-XACT, Estimation of Power from SAIF and from high-level models and Rent's Rule.

Exercise Sheets

Sheet 1 - first half of course PDF

For the MPEG question in both sheets: A New Diamond Search Algorithm for Fast Block-Matching Motion Estimation' Shan Zhu and Kai-Kuang Ma, IEEE Tans Imag Proc 2000..

Sheet 2 - second half of course PDF

Quick Sheet 1/2 PDF.

Quick Sheet 3/4 PDF.

Quick Sheet 5/7 PDF.

Further Materials

• AES HLS Example

• Further assorted lectures notes from previous years: SoC D&M Patterns Portfolio (PDF)

• Toy Logic Synthesiser in MLpure conversion, bit-blasting, gate building, Barrel Shifter, ML fragment.

• Simple RTL Example (link being fixed).

• SystemC ESL Modelling - Toy ESL practicals.

• DMA Controller RTL Version (from 2016 SoC Parts Slide Pack).

• Ethernet CRC ESL Exploration.

• Prazor Virtual Platform: Full TLM Model of Zynq Chip.

• Booting Linux on the Prazor Virtual Platform.

Course Revisions:

Last year, the Design-for-Test section was not lectured. And HLS was added as a primary topic.

This year, 2017/18, the syllabus will change further in that direction, with less emphasis on low-level SoC parts and with greater emphasis on custom accelerators for high-performance computing.
Last year’s course materials are still available.