HOME       UP       PREV       NEXT (H/W Design Partition)  

Part II CST SoC D/M Pack KG2 - Masked v Reconfigurable

  • Masked versus Reconfigurable Technology \& Computing
  • Chip Types and Classifications
  • ASIC - Application-Specific Integrated Circuit
  • Semi-custom (cell-based) Design Approach
  • Cell Library Tour
  • ASIC Costs: RE and NRE.
  • Gate Arrays and Field-Programmable Logic.
  • FPGA - Field Programmable Gate Array
  • Circuit Switching
  • Architectural Design: Partition and Exploration
  • H/W Design Partition
  • H/W versus S/W Design Partition Principles
  • Typical Radio/ Wireless Link Structure.
  • Partitioning example: A Bluetooth Module.
  • Super FPGAs: Example Xilinx Zynq