Ph.D. Opportunities
I am always looking for bright Ph.D. students - see my Opportunities page.
Ph.D. Students that Simon has supervised
I was the primary adviser for the following PhD students:
- Panit Watcharawitch, Multep: A Multithreaded Embedded Processor, 2003, now at FabriNet. [Technical Report]
- Simon Frankau, Hardware Synthesis from a stream-processing functional language, 2004 (jointly supervised with Alan Mycroft), now at Barclays Capital. [Technical Report]
- Scott Fairbanks, High Precision Timing Using Self-Timed Circuits, 2004, now at IBM Research. [Technical Report]
- Huiyun Li, Security Evaluation at Design Time for Cryptographic Hardware, 2005, now at the Chinese Academy of Sciences. [Technical Report]
- Jacques Fournier, Vector Microprocessors for Cryptography, 2007, now a research engineer at CAE-LETI. Previously a security architect at Gemalto. [Technical Report]
- Simon Hollis, Pulse-based, On-chip Interconnect, 2007, now a Lecturer at University of Bristol. [Technical Report]
- Ian Caulfield, Complexity-Effective Superscalar Embedded Processors Using Instruction-Level Distributed Processing, 2007, now an architect at ARM. [Technical Report]
- Matthew Johnson, A new approach to internet banking, 2008 [Technical Report]
- Alban Rrustemi, Computing surfaces - a platform for scalable ubiquitous interactive displays, 2008. Now working on a startup. [Technical Report]
- Arnab Banerjee, Communication Flows in Power-Efficient Networks-on-Chips, 2008. Imagination Technologies, UltraSoC, nVidia. [Technical Report]
- Philip Paul, Microelectronic security measures, 2009. Now at IBM Research in Zurich.. [Technical Report]
- Rosemary Francis, Exploring Networks-on-Chip for FPGAs, 2009. Setting up a company. [Technical Report]
- A. Theodore Markettos, Active Electromagnetic Attacks on Secure Hardware, 2010. Currently working as an RA with me. [Technical Report]
- Daniel Greenfield, Communication Locality in Computation: Software, Chip Multiprocessors and Brains, 2010. BCS Distinguished Dissertation Award Winner 2011.
- James Srinivasan, Improving cache utilisation, 2011. Now at 2d3. [Technical Report]
- Nick Barrow-Williams, Proximity Coherence for Chip-Multiprocessors, 2011. Now at nVidia in Santa Clara, CA, USA. [Technical Report]
- Meredydd Luff, Communication for Programmability and Performance on Multi-Core Processors, 2012. [Technical Report]
- Gregory Chadwick, Communication Centric Multi-Core, Fine Grained Processor Architecture, 2012. Now at Broadcom in Cambridge. [Technical Report]
- Paul Fox, Massively Parallel Neural Computation, 2013. Now an RA working with me. [Technical Report]
- Jonathan Woodruff, A RISC Capability System for Practical Memory Safety, 2014. Now an RA working with me. [Technical Report]
- Steven Marsh, Efficient programming models for neurocomputation, 2014.
- Robert Norton, Hardware support for compartmentalisation, 2015. [Technical Report]
- Colin Rothwell, Protection from malicious peripherals, 2017. [Technical Report]
- Alexandre Joannou, High-performance memory safety - optimizing the CHERI capability machine, 2017. [Technical Report]
- Hongyan Xia, Capability Memory Protection for Embedded Systems, 2019. [Technical Report]
- Marno van der Maas, Protecting against side-channel attacks in trusted execution environments, 2022. [Technical Report]
- Peter D. Rugg, Efficient spatial and temporal safety for microcontrollers and application-class processors, 2023. [Technical Report]
- Franz Fuchs, Toward Transient-Execution Attack Mitigations on CHERI, 2025
Before I started as a lecturer I co-supervised the following students with Prof. Peter Robinson:
- Steev Wilcox, Synthesis of asynchronous circuits, 1999. Previously Chief Architect and Director at Azuro (UK) Ltd, and now at Cadence. [Technical Report]
- Paul Cunningham, Verification of asynchronous circuit, 2002. Previously CEO at Azuro, Inc. and now Director of Research at Cadence. [Technical Report]