Department of Computer Science and Technology

Technical reports

Reasoning about the function and timing of integrated circuits with Prolog and temporal logic

M.E. Leeser

February 1988, 50 pages

DOI: 10.48456/tr-126

Full text

Only available on paper (could be scanned on request).

BibTeX record

@TechReport{UCAM-CL-TR-126,
  author =	 {Leeser, M.E.},
  title = 	 {{Reasoning about the function and timing of integrated
         	   circuits with Prolog and temporal logic}},
  year = 	 1988,
  month = 	 feb,
  institution =  {University of Cambridge, Computer Laboratory},
  address =	 {15 JJ Thomson Avenue, Cambridge CB3 0FD, United Kingdom,
          	  phone +44 1223 763500},
  doi = 	 {10.48456/tr-126},
  number = 	 {UCAM-CL-TR-126}
}