Course pages 2015–16

System-on-Chip Design

This year we will not cover the SystemC language details or go into depth regarding SystemC for net-level RTL modelling. We will refer to it for high-level ESL modelling.

Instead, this year, a few further/extra slides on Chisel, High-level Synthesis and formal methods have been added.

Examples Classes

There will be three classes on 10th, 12th and 17th May in FW26 starting about 2:05pm.

PDF Lecture Notes

(Lecture Notes PDF as originally printed).

Lecture Notes PDF with minor corrections added.

HTML Slides

SP1 Introduction and Soc Parts Review.
SP2 Power and Energy.
SP3 Design Partition.
SP4 RTL.
SP5 Assertion-Based Design.
SP6 Electronic System Level (ESL) Modelling .

Exercise Sheets

Main Exercise Sheet PDF.

Quick Sheet (last year's) PDF.

Further Resources

Further resources will be linked to here.

Online magazine: DESIGN AND REUSE.

Design and Layout of 8-bit Kogge Stone Adder 8 Pages (PDF).

MOSIS AMI 0.5 micron Cell Library 98 Pages (PDF).

Zynq 7000 Technical Reference Manual (PDF)

Zynq 7000 Documents Folder.

Last year’s course materials are still available.

Computer Laboratory