Computer Laboratory

Advanced Computer Design
Algebraic Path Problems, with applications to Internet Routing
Automated Reasoning
Building an Internet Router
Category Theory and Logic
Chip Multiprocessors
Computer Security: Principles and Foundations
Data Centric Systems and Networking
Introduction to Natural Language Syntax and Parsing
Lexical Semantics
Low Power Embedded Systems Programming
Modern Compiler Design
Multicore Semantics and Programming
Overview of Natural Language Processing
Research Skills
Research Students Lectures
Spoken Language Processing
Theories of Interaction and Socio-digital Design
A Mathematical Theory of Distributed Games and Strategies
Advanced Functional Programming
Advanced Operating Systems
Advanced Syntax and Semantics of Natural Language
Advanced Topics in Denotational Semantics
Biomedical Information Processing
Computer Security: Current Applications and Research
Discourse Processing
Flows in Networks
Interactive Formal Verification
Language and Concepts
Machine Learning for Language Processing
Sensor Fusion and Location Aware Computing
Social and Technological Network Analysis
System on Chip Design and Modelling
Usability of Programming Languages
Critical Coding for Digital Humanities

Course pages 2014–15

System on Chip Design and Modelling

Syllabus
Course materials
Assessment

This year (2014/15) we will be combining Accellera and Parallella !

Accellera SystemC.
Parallella SoC (Epiphany CMP and Dual ARM Zync FPGA).

We will use a high-level simulation model of this hardware platform and compare energy and performance figures predicted by the model with measurements on the cards.

All information will be placed on this link, updated as we go: LINK ACS-P35.

DJG 2015