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ACS P35 System-On-Chip Design and Modelling: Persistent Course Material

This course used to be generally about design processes for complex ASICs containing multiple processors and custom peripherals. Recently it has concentrated more on acceleration of algorithms using custom and reconfigurable hardware. The course is mainly practical, but there are two sessions where we discuss recent papers. And a large component of the final credit is for an essay that builds on top of the practical experience. The practical work involves designing a small custom accelerator and then seeing whether the performance and energy efficiency figures are affected according to the workload by measuring on a virtual model (using SystemC TLM) and an actual implementation (using Zynq FPGA).

Keywords: FPGA, HLS, RTL, Virtual Platform, Scientific Acceleration.

This year we shall concentrate on energy efficiency of hardware accelerators for scientific computation with emphasis on FPGAs.

Meanwhile, please read: "Fundamental Underpinnings of Reconfigurable Computing Architectures" by DeHon.

And take a look at the SystemC get-started and 2.0-TOY-ESL SYSTEM classes. We will work through these toy SystemC classes in the first week and a half of term before moving on to the much-more-complicated but basically-the-same Prazor system.

And please read through this slide pack VACATION SLIDE PACK. Please only pay close attention to the SystemC material in this pack. All of the material will be covered in detail, during the term-time sessions. However, I ask people to read the slides and supporting papers before the timetabled slots so that we can have increased interactive discussion during the sessions.

Lent Term 2017/18

Take a mental note of this page's URL. Please dont get mixed up with the SoC D&M Bachelors' course. Some links lead away from the P35 course to that material and the 'Home' links will then take you to the undergraduate course pages of a very similar name.

Useful Quick Links

This Year - Week-by-Week Lent Term 2017/2018

  • P35 2016/17 Preliminary Preparation (MichVac)
    Before the first session please go to MichVac Preparation.

Timetable: P35 Lent Term 2017/18

We will 8 timetabled slots on Friday afternoons this term. We may not use one of them. The first hour or so will consist either of a 'lecture' from DJG or a discussion of papers from the reading list. The second hour will be group practical work using tools including HLS, SystemC and Zynq FPGA. It is expected that most of the work for this module is conducted outside of timetabled sessions. Also, you are expected to briefly read through the materials for a session in advance of the timetabled slot and, for several of the 'lectures' most of the slides will be skipped unless a group member explicitly requests we go over the material. Please feel free to email DJG or request a meeting at all other times, outside the schedulled sessions, whenever you encounter a hold up with the practical work.

    I will get information by email from the class members regarding their prior experience before filling in any further details here ...

    The timetable details for the week will be filled in the week before. But for your reference, the timetable from last year is still online.

  • Week 1: 19th January 2018: This week in the formal session we shall:
    1. Say hello to each other and discuss PLAN18 (not online yet).
    2. Look at these diagrams SoC Example and FPGA-based Accelerator Example
    And afterwards
    1. Please work through the SystemC and 2.0-TOY-ESL SYSTEM TOY ESL classes, (you can leave the final parts that use TLM until week 2 if you wish).
    2. Please read the entries on this year's Reading List 1 and be ready to discuss them briefly at next week's session, but we will leave full discussion to a following session.

  • Week 2: 26th January 2018: This week in the formal session we shall:
    1. Look at these diagrams which we skipped last week SoC Example and FPGA-based Accelerator Example
    2. Lecture about TLM coding for high-performance system modelling and the Toy ESL system implemented TLM in its final classes using the first half of the slides in the ESL-2.1 Slide Pack.
    3. We will briefly look at Reading List 1 in preparation for a group discussion next week.
    4. Preview the first Assessed Exercise.

  • Week 3: 2nd Feb 2018: This week in the formal session we shall
    1. Further TLM.
    2. Quick look at reading list allocations.
    3. Power + Energy: Mechanisms and Modelling: 4.2 Power and more of ESL-2.1 Slide Pack.
    4. Preview the second Assessed Exercise.
    5. Mentioned David May's three examples HERE.

  • Week 4: 9th Feb 2018: This week in the formal session we shall
    1. We move on from toy system to Prazor BTLM with discussion and discuss build details held over from last week.
    2. Demo David May's three examples HERE.
    3. Recommend you install an IP block in Prazor (e.g. Assessed Ex 2 solution).
    4. Consider reproducing Spectre speculative execution Project Zero Report
    5. Look at power modelling techniques, SAIF, XPower, TLM Power 3... ESL Power Modelling.
    6. Look at reconfigurable accelerator architectures. LINK (obj-2.2).
    7. Discuss PLAN18 and group mini-project.

  • Week 5 : 16th Feb 2018:
    1. Review Exercise 2,
    2. First reading list discussion (six papers),
    3. Exercise 3 discussion,
    4. then a practical session generating FPGA Zynq bit streams.

  • Week 6 - 23rd Feb 2018:
    1. Assessed Exercise 2 further discussion.
    2. HLS Lecture: Higher-level design and High-Level Synthesis (HLS).
    3. Kiwi HLS - tool set up and demo - (SystemC output too?)
    4. Exercise 3 planning: Perhaps using AES or Design of power-efficient parallel pipelined Bloom filter by Deokho Kim.

  • Week 7 - 2nd March 2018:
    1. Group Mini-Project Discussion and Practical Work.
    2. Assertion-Based Design (ABD)

  • Week 8: ... second reading list discussion and structured essay advice.

Over the Easter Vac you will write up the main assessed work to be given in at the start of the Easter Term.


Material from Previous Years:

Material from previous years is HERE.