Course pages 2014–15
System on Chip Design and Modelling
DRAFT - NONE OF THE EXERCISE LINKS WORKS YET - WILL BE FILLED IN AS WE GO.
Assessed Exercises 2014/15
NOTE: As well as completing these exercises you are expected to have read each week a paper from the reading list and be ready to lead a short discussion of that paper with the rest of the class.
The assessed work consists of Exercises 1, 2 and 3 during the course and a mini-project and structured essay that are to be completed over the Easter Vacation that are largely based on the term-time exercises.
Worksheets for the exercises will be added below. They have target deadlines assigned during the Lent Term. They will be quickly checked/marked and returned to you for possible improvement. Re-submission to get a higher mark is allowed at any point up to the final deadline at the start of the Easter Term.
The total credit available is 100 marks.
For each of exercises, first do the requested practical work sheet. Some questions are provided at the end of each sheet which must each be answered in one or two sentences. Please hand in a short report to Postgraduate Admin that includes source file listings for files you have created, illustrative output from simulations that demonstrate your result and the answers to the questions. The written part of your report and question answers together should not exceed two pages. The work sheets will be put online, below, about ten days before the work is due to be handed in.
Please also email a PDF of your work to DJ Greaves (although do not worry if some figures are missing etc..).
- Exercise 0: (Christmas Vacation Work): Please ensure you can run the get-you-started "hello world" example in TOOLINFO. Please try to understand every aspect of it and let us know if you foresee any problem. A fairly good knowledge of C++ and the options to the C++ compiler and linker will be needed. Knowledge of makefiles and git will also be helpful. If you have your own machine running 64bit linux then getting SystemC running on that may be useful. Also, please take a good look at the vacation slide pack : VACATION READING. Deadline: Please try to complete in advance of the first practical session. Credit: 0 Marks. Based on the personal email summaries you have already sent, at the first practical session we will review the collective experience of the class to see how much EDA material needs to be formally lectured to you.
- Exercise 1: Basic RTL I/O device.
A simple RTL design is provided in Verilog consisting of a pair of communicating components. The task is to re-encode one of the components using RTL-like SYSTEMC. Link to work sheet is HERE. Deadline: 10:00am Weds 28th January: 5 Marks.
- Exercise 2: TLM model of same I/O device and rough design of an on-chip message passing API.
The design from Exercise 1 is implemented again in SystemC, but using a transactional modelling style. Link to work sheet is HERE. Deadline: 10:30am Monday 9th February: 5 Marks.
- Exercise 3a:
Demonstrate proficiency with the Parallella Card blocking-TLM model
by preparing an experiment that can potentially be taken further
in Exercise 4. Interim sheet is HERE.
You will conduct a preliminary form of one of the investigations to be listed
on the main site. Your structure must enable various comparisons to be made (such as
altering the number of processor cores used and the relative roles of
software and specialist hardware).
Working in pairs is allowed, with one person writing the application code and the other writing the TLM model or message-passing API etc.. Make it clear who did what. Link to work sheet is HERE. Deadline: 12:00 noon Monday 2nd March: Credit 0 Marks.
- Exercise 3b: Using the experiment prepared in Exercise 3a, or otherwise, make an investigation of modelling accuracy, performance, power, area or other trade offs. There is no work sheet this year (but last year's one remains online as a guide LAST), just interpolate between Exercise 3a and the Miniproject and make sure you have some concrete numbers to discuss in depth. Deadline: (as per 3c): Credit 20 Marks.
- Exercise 3c: Mini-Project Specification This is your last chance to change the direction of the practical work. Please submit your plans and progress so far for your mini-project. These should be in the style of Exercise 3a and most likely have been discussed with D Greaves in advance. Deadline: 10:00am Thurs 12th March: Credit 0 Marks.
- Easter Vacation: Mini-Project and Structured Essay
Mini-Project: Conduct novel practical work according to the specification agreed in Exercise 3c and write it up in a style suitable for publication in Electronics Times or Design and Reuse. Credit 40 Marks.
Research Essay: Title 'SoC Design and Modelling'. Write a research essay strictly according to the provided structure that uses the mini-project as a worked example as much as possible. Credit 30 Marks.
Link to work sheet is HERE (draft form).
Deadline: Both due first day Easter Full Term, Tuesday 21st April. Collaborating is not allowed for the Research Essay and is only allowed for any parts of the mini-project that are borrowed from the term-time work or with express permission that will only be granted if the nature of the collaboration will enable individual contributions to be clearly discriminated.
© David Greaves, January 2015.