SystemonChip: Design and Modelling 2008–09
Principal lecturer: Dr David Greaves Taken by: Part II Syllabus
This course is arranged into eight different topics. These cover all of the
material in the published
5Bsyllabus
but in a slightly different order.
Material by Topic (Lecture Group)
 1 R: Verilog RTL Design: Simulation and Synthesis,
 2 SC: SystemC,
 3 SD/FSD: System Design and Structure: Worked Examples,
 4 ESL: Transactional Modelling (Electronic System Level),
 5 ABD: AssertionBased Design,
 6 SFT: Structure, Flow and Tools,
 7 RD: Recent Developments,
 8 E: Engineering.
In rough terms, the earlier topics will span two lectures and the later
topics will be covered in one lecture.
The Recent Developments topic (LG7)
will only be lectured this year if time permits.
Lecture Guide and Slides
Copies of slides : SLIDES.
Lecture Notes: MUCH EXTENDED OVER EASTER VAC 2009 SEE NEW LEARNERS GUIDE.
Narrative Learners' Guide (updated after each lecture): GUIDE.
Worked and Running Examples
Material for the worked and running examples is here: PRACTICALS.
Additional Course Material
Additional course material is being placed HERE.
Exercises
 Lecture Groups 14 (R, SC, SD, ESL): PDF, HTML.
 Lecture Groups 58 (ABD, SFT, RD, E): PDF, HTML.
(Supervisors only: Contact DJG for answers to exercises).
Past Exam Questions: There are none since this is a new course.
Last Year's VLSI Course
The current course replaces the older VLSI course that has been given for the last 20 years.
EDA (electronic design automation) can be divided into two fields: frontend that
deals with design capture and modelling and backend, that deals with fabrication
and layout. The bridge between these two halves is Synthesisable RTL.
VLSI Course Page.
Half of the material from the VLSI course is not relevant to SOCDAM since it covers
the back end of the EDA flow.
VLSI Past exam questions
