ASPLOS 2012 Doctoral Workshop

1st ASPLOS Doctoral Workshop

In conjunction with ASPLOS 2012
London, UK - Sunday, 4 March 2012

The 1st ASPLOS Doctoral Workshop is sponsored by D. E. Shaw Group

London Montage


TimeTitle & Speakers
Session 1
Timothy Jones & Onur Mutlu
9.10Interaction of Hardware Transactional Memory with Microprocessor Design
Stephan Diestelhorst (Dresden University of Technology / AMD)
9.20TM2C: Transactional Memory for Many-Cores
Vasileios Trigonakis (EPFL)
9.30Synchronization and data exchange in multi-core architectures
Dmitri Perelman (Technion)
9.40Elastic Cooperative Random-Access Memory
Kim-Thomas Rehmann (Heinrich-Heine-Universität Düsseldorf)
9.50Capacity- and Performance-Efficient Design of Memory Hierachy in CMPs Using Multi-Level Cell NVMs
Mohammad Arjomand (Sharif University of Technology)
10.00Intelligent Cache Management for Reducing Memory System Waste
Samira M Khan (University of Texas at San Antonio)
10.10Prioritized Cache Coherence for Bus-Based CMP
Abdulaziz Eker (TOBB University of Economics and Technology)
10.20Cache coherence using release-acquire partial ordering
Marco Elver (University of Edinburgh)
Session 2
11.00Locality-based dynamic scheduling of user-level tasks on multicore processors
Ananya Muddukrishna (KTH Royal Institute of Technology)
11.10Task Assignment of Network Applications in Multithreaded Processors
Petar Radojkovic (Barcelona Supercomputing Center)
11.20Ironclad C++: A memory-safe dialect of C++
Christian DeLozier (University of Pennsylvania)
11.30A Unified Language for Hardware/Software Codesign
Myron D. King (MIT)
11.40Grassroots ASPLOS: can we still rethink the hardware/software interface in processors?
Raphael 'kena' Poss (University of Amsterdam)
11.50Rearchitecting System Software for the Cloud
Muli Ben-Yehuda (Technion)
12.00Resources Allocation for Cloud Architectures
Paolo Campegiani (Università degli studi di Roma Tor Vergata)
12.10Experimenting with I/O data paths in Virtualized Environments
Anastassios Nanos (National Technical University of Athens)
12.20Efficient and Scalable Data and Metadata Management in Hybrid Memory Systems
Justin Meza (CMU)
Session 3
13.30Transiently Powered Computers
Benjamin Ransford (UMass Amherst)
13.40Towards Increasing Energy Scalability in Many-Core Systems
Simon Holmbacka (Åbo Akademi University)
13.50Adaptive Parallel Patterns for Heterogeneous CPU/GPU Applications in Computational Nanoscience
Michael Garba (Robert Gordon University)
14.00Automated Code Generation, Performance Prediction and Platform Design in a Parallel and Heterogeneous Computing Era
Cedric Nugteren (Eindhoven University of Technology)
14.10An integrated Machine Learning and Control Theoretic model for mining concept-drifting data streams
Sai Kiran Mukkavilli (Tennessee State University)
14.20Implementation of parallel circuit simulation algorithms
Alex Lam (Southampton University)
14.30Model-driven principles for modeling dynamic systems dependability
Igor Kaitovic (University of Lugano)
14.40Mutable Replay for Automated Regression Testing of Security Updates
Ilia Kravets (Technion)
14.50Kernel Integrity Protection from Untrusted Extensions Using Dynamic Binary Instrumentation
Akshay Kumar & Peter Goodman (University of Toronto)
15.30Doug Burger (Microsoft)