GALS Project (Globally Asynchronous, Locally Synchronous Circuits)

Together with Prof Steve Furber's Amulet group (now the APT group) at the University of Manchester, we are developing system-on-chip design techniques based on a mixture of industrial strength synchronous techniques and more research oriented asynchronous techniques. The name of the project comes from the idea of building systems using Globally Asynchronous but Locally Synchronous techniques. This allows conventional synchronous techniques to be applied in the small (e.g. an embedded 32-bit processor or an I/O device) whilst using asynchronous techniques to provide a communication infrastructure between these islands of synchrony. We believe that this is particularly advantageous now that clock distribution consumes a great deal of power and simple assumptions about clock skew being low between neighbouring circuits is no longer true.

This project started in October 2001 and is funded by EPSRC for 3 years.

Publications

Project Conference Papers

Simon Moore, George Taylor, Robert Mullins, Peter Robinson, Point to Point GALS Iterconnect, Eighth International Symposium on Advanced Research in Asynchronous Circuits and Systems, 2002

Project Workshop Papers

S.W.Moore, G.S.Taylor, R.D.Mullins and P.Robinson, Bundled-Data vs Clocked ASIC Design, 10th UK Async. Forum, July, 2001.

S.W.Moore, G.S.Taylor, R.D.Mullins and P.Robinson, Channel Communication Between Independent Clock Domains, Fifth ACiD-WG Workshop, Nauchatel, 2001.

Preliminary Work

S.W. Moore, G.S. Taylor, P.A. Cunningham, R.D. Mullins and P.Robinson, Self Calibrating Clocks for Globally Asynchronous Locally Synchronous Systems, International Conference on Computer Design, Austin Texas, September 2000.

G.S. Taylor, S.W. Moore, P. Robinson, An on-chip dynamically recalibrated delay line for embedded self-timed systems, Sixth International Symposium on Advanced Research in Asynchronous Circuits and Systems, April 2000.

S.W. Moore, G.S. Taylor, P.A. Cunningham, R.D. Mullins and P.Robinson, Using Stoppable Clocks to Safely Interface Asynchronous and Synchronous Subsystems, AINT (Asynchronous INTerfaces), Delft, Netherlands, July 2000.

S.W. Moore, G.S. Taylor, P.A. Cunningham, R.D. Mullins and P.Robinson, Clock Stretching Circuits, 8th UK Async. Forum, June, 2000.

G S Taylor, S W Moore, P Robinson, Frequency Locked Loops: Adding Some Asynchronous Circuits to Synchronous Circuits, 7th UK Async. Forum, December 1999