1st European NetFPGA Developers Workshop, Sep. 9-10th, 2010

Programme and presentations

University of Cambridge, Computer Laboratory

Wednesday 8th Sep, 2010

9:00 - 17:00 Demo Setup - contact David.Miller at cl.cam.ac.uk with your intentions/needs

Thursday 9th Sep, 2010

8:45 Pastries/Fruit/Tea/Coffee

9:00 Welcome 

9:15 - 10:00  Special Guest

Presenting the NetFPGA 10G

Michaela Blott


Presentation (PPT)

10:00 - 10:30 Coffee/Tea break

10:30 - 12:00 Paper Session 1

Towards Software-defined Silicon: Experiences in Compiling Click to NetFPGA

Pekka Nikander (1) Benny Nyman (1) Teemu Rinta-aho (1) Sameer Sahasrabuddhe (2) James Kempf (3)

(1. Ericsson Research NomadicLab, 2. Indian Institute of Technology Bombay, 3. Ericsson Research)

Paper (PDF) Presentation (PDF)

NAT implementation for the NetFPGA platform

Omar Choudary, David J. Miller 

(Computer Laboratory, University of Cambridge)

Paper (PDF) Presentation (PPT)

Design Remote Reconfiguration Supported Security Protection System on NetFPGA and Virtex5

Kai Zhang (1) Xiaoming Ding, Ke Xiong (1, 2) Shuo Dai (1) 

(1. Institute of Information Science, Beijing Jiaotong University, 2. Department of Electronic Engineering, Tsinghua University)

Paper (PDF) Presentation (PPT)

12:00 - 13:00 Lunch

13:00 - 14:30 Paper Session 2

A Wire-speed Packet Classification and Capture Module for NetFPGA

Malcolm Scott (Computer Laboratory, University of Cambridge)

Paper (PDF)

Packet Classification Through Regular Expression Matching on NetFPGA

Gianni Antichi (1), Andrea Di Pietro (1), Domenico Ficara (2), Stefano Giordano (1), Gregorio Procissi(1), Fabio Vitucci(1)

(1. Dept. of Information Engineering University of Pisa, 2. Cisco System International)

Paper (PDF)

Addition of Virtual Interfaces in NetFlow Probe for the NetFPGA

Muhammad Shahbaz (1) Zaheer Ahmed  (2) Habibullah Jamal (1) Asrar Ashraf (1) Nadeem Yousuf (1) Raania Naeem Khan (1) 

(1. Center for Advanced Studies in Engineering 2. University of Engineering and Technology)

Demo (mov or mwv) Presentation PPTS (including audio track) Paper (PDF)

14:30 - 15:00 Coffee/Tea break

15:00 - 16:00 Community Session

Toward an open community for (networking) hardware.

Gordon Brebner (Xilinx), Andrew W. Moore (Cambridge University Computer Laboratory) and community.

Initial Presentation (PPT) very sketchy notes (txt)

After two short presentations and a discussion we will adjourn to the Castle Inn Public House for further discussions and refreshments

19:00 Dinner La Mimosa (location) Photos here.

Friday 10th September, 2010

8:45 Pastries/Fruit/Tea/Coffee

8:45 - 10:15 Paper Session 4

Secure in-packet Bloom Filter forwarding in the NetFPGA

Adnan Hassan Ghani, Pekka Nikander (Ericsson Research, NomadicLab)

Paper (PDF) Presentation (PDF)

A Deficit Round Robin Input Arbiter for NetFPGA

Jonathan Woodruff (Computer Laboratory, University of Cambridge)

Paper (PDF) Presentation (PPT)

An Open-Source Hardware Module for High-Speed Network Monitoring on NetFPGA

Gianni Antichi (1), David J. Miller (2), Stefano Giordano (1)

(1. Dept. of Information Engineering University of Pisa, 2. Computer Laboratory, University of Cambridge)

Paper (PDF) Presentation (PPT)

10:15 - 10:30 Coffee/Tea break

10:30 - 11:30 Paper Session 5

Implementation of Content-oriented Networking Architecture (CONA): A Focus on DDoS Countermeasure

Junho Suh, Hoon-gyu Choi, Wonjun Yoon, Taewan You, Ted "Taekyoung" Kwon, Yanghee Choi

(School of Computer Science and Engineering Seoul National University)

Paper (PDF) Presentation (PPT)

A Prototype Implementation of MOOSE on a NetFPGA/OpenFlow/NOX Stack

Daniel Wagner-Hall (1), Malcolm Scott (2,1)

(1. Computer Laboratory, University of Cambridge, 2. University College London)

Paper (PDF) )

11:30 - 12:00 Wrap up

Midday Finish; safe travels.