Lab 2 - Simulation and Architecture
This lab contains two parts. As a guideline, each part should take between one and two weeks.
Lablet 2.1 - Simulation
You will use Modelsim to simulate the TTC CPU discussed in lectures. You will write some assembly code to be executed by the processor during simulation. Simulation is used extensively to test functional correctness of a design before embarking on timely synthesis runs.
Lablet 2.2 - Architecture
You will produce a Mandelbrot set viewer on the tPad. This will involve creating a multi-core architecture, in which many copies of the TTC processor component simulated in Lablet 2.1 are used to calculate points of the Mandelbrot set.