ECAD and Architecture Practical Classes
- The TTC assembly examples use the sin flag to check if the input stream is ready. Why is this not actually necessary for the implementation used in the labs?
- The ring processor contains two FIFOs and a custom component instantiating a number of TTC cores. What interfaces connect the FIFOs to this component and how might this allow data to be directed to a specific TTC?
- Correct answers to the above questions are provided in a written form.
- All exercises are completed according to the specified behaviour.
- A live demonstration of your solutions meeting the ticking criteria for each lablet.
- Your SystemVerilog and assembler code needs to be cleanly formatted and commented, with the following header:
- Give a live demonstration of your solutions meeting the ticking criteria for each lablet.
- Show your work and answers to the questions (on screen or paper) to one of the demonstrators. They will award you with a tick if the work is up to standard.
- Print out your final work and add it to your portfolio to be submitted as instructed in the Head of Department Notice.