Supervisions for VLSI Design will be organsised by the Computer Laboratory.

The following questions are suggested for three supervisions, but individual supervisors might set different work.

Exercises for the first supervision

• CST 1996 Paper 9 Question 1 (CMOS designs)
  Ignore the last part of the question if we haven't reached barrel shifters when you try this.
• CST 1998 Paper 7 Question 1 (CMOS invertors)
  You might have to read ahead in the notes to understand the reference to a buffer chain.
• CST 1999 Paper 7 Question 1 (PLAs)
  Note that the primes after signal names indicate inversion, so there are three primary inputs and their inverses to be considered.
• CST 2001 Paper 9 Question 2 (Dynamic latch)
• CST 2004 Paper 8 Question 2 (Dynamic CMOS)

Exercises for the second supervision

• CST 2002 Paper 9 Question 2 (Carry propagation)
• CST 2003 Paper 9 Question 2 (Carry propagation)
• CST 2004 Paper 9 Question 2 (Logical effort)
• CST 2005 Paper 8 Question 8 (NOR gates)
• CST 2005 Paper 9 Question 2 (Memory designs)

Exercises for the third supervision

• CST 1999 Paper 9 Question 2 (Muller C element)
• CST 2002 Paper 8 Question 2 (NAND gates)
• CST 2003 Paper 8 Question 2 (XOR designs)
• CST 2006 Paper 8 Question 2 (Minority gate)
• CST 2006 Paper 9 Question 2 (Dynamic dual-rail logic)

Revision exercises

• CST 2007 Paper 7 Question 11 (AND gates)
• CST 2007 Paper 9 Question 3 (Adder)