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Course pages 2023–24

ECAD and Architecture Practical Classes

Routes through the labs

We are aiming to support both in-person and remote learning, with demonstrator support being provided both in person during scheduled lab times (Fridays and Tuesdays 2-5pm) and via online collaboration tools. Due to challenges in terms of supporting students on numerous platforms, we have reduced the amount of compulsory content this year, which means the physical hardware parts are no longer compulsory. Students are encouraged to read through the material and follow as many of the steps as they are able. There are several pathways through the labs that do not require all of the prior material, which we outline below.

Hardware is available for those who would like to attempt those exercises (we'll describe how to organise a collection when you get to that point). If you're in need of help with the FPGA-related parts we'll do our best to help but please be aware it's easiest to do this in the in-person lab sessions as it's more difficult to do remotely. If you do run into trouble, we would advise not spending too long trying to fix them on your own - move on to the next exercise if you can't make progress.

Due to the technical complexity and risk, we have provided several suites of tools that can be used to achieve some or all of the labs:

Route A: VirtualBox virtual machine

  • 8GB download and installation of virtual machine using VirtualBox
  • Full access to all tools
  • Support for attaching FPGA hardware if available
  • Requires Intel/AMD CPU with at least 4GiB RAM (more recommended) and 32GB free storage (a USB drive or SD card can be used with some performance penalty).
  • Best-effort support (easier in person than remotely)

Route A2: UTM (QEMU) virtual machine on Apple Silicon Macs

  • As route A but a workaround for lack of ARM-native FPGA tools
  • Ubuntu ARM VM plus some emulation hacks to run the FPGA tools
  • Experimental but it seems to work so far
  • Performance worse than native x86 but acceptable (~12 minute final FPGA build time on M1 Mac Mini)
  • Emulation hacks should cover everything needed for the lab but other tools may not work/need additional hacks
  • Very limited support available (we'll try but quite possible we don't have the answers)
  • Feedback very much appreciated!

Route B: SSH access to department server

  • Online interactive access needed (low latency helpful)
  • No downloads needed
  • RISC-V assembler and C compiler available
  • Spike RISC-V simulator (command line)
  • Modelsim Verilog simulator (GUI) - should work but may be slow
  • Quartus FPGA synthesis (GUI) - should work but may be slow
  • No hardware access
  • Supported route

Route C: RISC-V tools in Docker container

  • Can work offline after initial setup
  • Docker container can be installed on local machine running Windows, MacOS or Linux (<1 GB download)
  • RISC-V assembler and C compiler
  • Spike RISC-V simulator (commandline)
  • No GUI tools (Modelsim Verilog/Quartus)
  • No FPGA synthesis or use of hardware
  • Supported on best-effort basis

The status of the various exercises under different routes are given in the table below:

ExerciseRoute A (VM)Route B (SSH)Route C (Docker)
1. SystemVerilog tutor
2. Inputs (sim)
3. FPGA †½
4. Qsys †½
Extra: Tonegen †
6. Etch-a-sketch (sim)½
6. Clarvi FPGA †½
6. Etch-a-sketch (FPGA) †½

✓ Exercise can be completed
½ Can be completed but GUI responsiveness / build times may be slow, especially if many people using it at once
† Requires hardware to test and debug; can still be undertaken without but won't be able to test

Demonstrators will be available to help with problems. Due to the increased potential variability of students' environments and limitations of remote collaboration tools, there are chances we might be faced with difficulties we cannot resolve. For this reason our supported route (Route B) is more limited. We'll do our best to support other platforms as best we can. If you have difficulties we can't resolve, it is possible to copy your files to the SSH server (Route B) and continue working there.

Recommended routes

If you have a machine of suitable specification and bandwidth isn't a problem for you, we'd recommend trying Route A in the first instance. This will provide the richest environment of tools. In past years 90-95% of students have used this route successfully, albeit some needing help with setup (we can resolve many but not all problems). This will work largely offline after initial setup, although online access is needed for submission.

If Route A doesn't work for you and you have reliable internet connectivity, we would recommend Route B as it requires minimal setup on your part. We support this route as we are more able to resolve problems later on. In Route B you won't be able to program the FPGA, and GUI access may be slow. We may ask you to use it if you have insurmountable problems with another route.

If for some reason bandwidth is an issue, Route C is a smaller download and has more ability to work offline. You won't be able to undertake Verilog or FPGA components but it should be sufficient to achieve the tick.