Computer Laboratory

Course pages 2012–13

Digital Electronics

Principal lecturer: Dr Ian Wassell
Taken by: Part IA CST
Past exam questions
Information for supervisors (contact lecturer for access permission)

No. of lectures and practical classes: 12 + 7
Suggested hours of supervisions: 4
This course is a prerequisite for Operating Systems and Computer Design (Part IB), ECAD and Architecture Practical Classes (Part IB).


The aims of this course are to present the principles of combinational and sequential digital logic design and optimisation at a gate level. The use of n-MOS transistors for building logic gates is also introduced.


  • Introduction. Semiconductors to computers. Logic variables. Examples of simple logic. Logic gates. Boolean algebra. De Morgan’s theorem.

  • Logic minimisation. Truth tables and normal forms. Karnaugh maps.

  • Binary adders. Half adder, full adder, ripple carry adder, fast carry generation.

  • Combinational logic design: further considerations. Multilevel logic. Gate propagation delay. An introduction to timing diagrams. Hazards and hazard elimination. Other ways to implement combinational logic.

  • Introduction to practical classes. Prototyping box. Breadboard and Dual in line (DIL) packages. Wiring. Use of oscilloscope.

  • Sequential logic. Memory elements. RS latch. Transparent D latch. Master-slave D flip-flop. T and JK flip-flops. Setup and hold times.

  • Sequential logic. Counters: Ripple and synchronous. Shift registers.

  • Synchronous state machines. Moore and Mealy finite state machines (FSMs). Reset and self starting. State transition diagrams.

  • Further state machines. State assignment: sequential, sliding, shift register, one hot. Implementation of FSMs.

  • Electronics, devices and circuits. Current and voltage, resistance, basic circuit theory, the potential divider. Solving non-linear circuits. Resistor-Capacitor (RC) circuits. Materials, semiconductors and the p-n junction, i.e., the diode. N-channel MOSFET and n-MOS logic, e.g., n-MOS inverter. CMOS logic. Logic families. Noise margin. [3 lectures]


At the end of the course students should

  • understand the relationships between combination logic and boolean algebra, and between sequential logic and finite state machines;

  • be able to design and minimise combinational logic;

  • appreciate tradeoffs in complexity and speed of combinational designs;

  • understand how state can be stored in a digital logic circuit;

  • know how to design a simple finite state machine from a specification and be able to implement this in gates and edge triggered flip-flops;

  • understand how to use MOS transistors to build digital logic circuits.

  • understand the effect of finite load capacitance on the performance of digital logic circuits.

Recommended reading

* Harris, D.M. & Harris, S.L. (2007). Digital design and computer architecture. Morgan Kaufmann.
Katz, R.H. (2004). Contemporary logic design. Benjamin/Cummings. The 1994 edition is more than sufficient.
Hayes, J.P. (1993). Introduction to digital logic design. Addison-Wesley.

Books for reference:

Horowitz, P. & Hill, W. (1989). The art of electronics. Cambridge University Press (2nd ed.) (more analog).
Weste, N.H.E. & Harris, D. (2005). CMOS VLSI Design - a circuits and systems perspective. Addison-Wesley (3rd ed.).
Mead, C. & Conway, L. (1980). Introduction to VLSI systems. Addison-Wesley.
Crowe, J. & Hayes-Gill, B. (1998). Introduction to digital electronics. Butterworth-Heinemann.
Gibson, J.R. (1992). Electronic logic circuits. Butterworth-Heinemann.