CASCADE welcomes the 2026 cohort of students

6 October 2026

We're really pleased to announce five new students who are starting their studies in CASCADE this academic year. Welcome Justin, Muhammad, Arin, Luigi and Dalia!

Following the arrival of our first PhD students last year, CASCADE is welcoming its second cohort. The students' topics span the breadth of CASCADE's interests, from memory prefetching and passing program semantics to the processor, through to verified hardware compilation and new foundations for compiler infrastructure.

Reconfigurable memory prefetching

Justin (Yinting) Huang will investigate a reconfigurable, hardware–software co-designed approach to memory prefetching. Supervised by Timothy Jones, Justin's project aims to bridge the gap between compiler and hardware by developing a universal, reconfigurable prefetching architecture guided jointly by static program analysis and dynamic run-time information. By combining compiler-derived knowledge of program intent with runtime learning, he expects that his architecture will capture a broader range of memory-access patterns, hiding memory latency more effectively, and using hardware resources more efficiently than conventional fixed-function prefetchers. Justin holds an MEng from Imperial College London.

Semantic information for irregular HPC workloads

Also starting now is Muhammad Khan, who holds a Bachelor's degree in Electrical Engineering from the University of Illinois Urbana-Champaign and a Master's degree in Electrical and Computer Engineering from the University of Michigan. Working with Simon Moore, he will also investigate the use of performance-relevant semantic information within program binaries. A specific application will be accelerating irregular high-performance computing workloads. His aim is to recover rich program semantics from unmodified codes in standard languages, such as C, C++ and Fortran, using machine learning, and communicate this to a specialised RISC-V microarchitecture as semantic metadata, without requiring modifications to the original source code.

A co-optimisation communication framework

Arin Paliwal recently earned an undergraduate degree from Manipal University Jaipur. His past work includes developing gem5-based adaptive routing algorithms for Networks-on-Chip (NoC) and modelling realistic cache-coherence infrastructure for Near-Data Processing (NDP) systems. His PhD, advised by Timothy Jones, aims to design a novel communication framework for hardware-software co-optimisation called Nārada. This will introduce new specialised channels of communication spanning compilers, operating systems and hardware, enabling the various abstraction layers to proactively tune and refine their respective optimisation policies using rich semantic information generated by the compiler and underlying hardware. Nārada aims to achieve this through a decoupled pipeline for program execution and metadata, a modular subsystem that avoids cyclic dependencies and by providing forward and backward compatibility.

Verified hardware compilation

Joining us in January 2027 is Luigi Rinaldi, a graduate of Electronic and Information Engineering from Imperial College London, with a focus on digital design and compilers. Advised by Jeremy Yallop and Tobias Grosser, Luigi is interested in developing a verified hardware compilation platform, with a focus on optimisations in the datapath section of circuits. This will build on earlier work verifying arithmetic optimisations, refining the analysis to reason about symbolic interval bounds and combining it with the CIRCT compiler project to develop a formally verified arithmetic circuit optimisation tool. In the shorter term, Luigi will be contributing to ongoing formalisation efforts in the VeIR project, where the MLIR compiler framework is being implemented in Lean, by implementing decision procedures to solve parametric bitvector formulas. This will enable practical and automated verification of optimisations from current compilers, leading to end-to-end verification guarantees.

Database-backed compilers

Also starting in January 2027 is Dalia Shaaban, who is currently completing a Master's at ETH Zürich, specialising in systems, compilers and data management. Dalia will be advised by Tobias Grosser and Martin Kleppmann, and will explore how ideas from modern database management systems can be used to rethink compiler design and optimisation. The research will investigate an architecture in which a program's intermediate representation is modelled as a persistent database, with optimisations expressed as transactional rewrites. This will allow the compiler to preserve and revisit previous states, explore alternative optimisation paths, and safely roll back unsuccessful decisions. It will also provide a natural foundation for techniques such as Monte Carlo Tree Search to navigate the large space of possible optimisation sequences, with the ultimate aim of compiler infrastructure that can adapt optimisation strategies across different programs, domains and hardware.

Welcome Justin, Muhammad, Arin, Luigi and Dalia. We're delighted to have you with us at the CASCADE Centre.