SCALE Communications Project
This project developed communication and synchronisation techniques for high performance but low-power embedded systems-on-chip. This work was in collaboration with Krste Asanovic at MIT's Laboratory for Computer Science (LCS) where the SCALE tiled processor is being developed. We will be making use of techniques from the GALS project but with much higher performance in mind.
This project was started in January 2003 with support from CMI.