Christopher Pulte

cp526@cl.cam.ac.uk
University of Cambridge, Computer Laboratory
15 JJ Thomson Avenue, Cambridge, CB3 0FD, UK

Research Associate at the Computer Laboratory, University of Cambridge with Peter Sewell. My research interests are in programming language semantics and type systems, concurrency, and verification.


I am working in the area of relaxed memory concurrency, in particular on the semantics of concurrent ARMv8 and RISC-V (and POWER) machine code programs: establishing the architectural semantics and developing precise formalisations, as a basis for testing and verification, and to inform programming language implementation above these architectures.

From 2014 to 2018 I did my PhD at the University of Cambridge, supervised by Peter Sewell. My thesis (below) tries to provide a better understanding of the relaxed memory concurrency models of ARMv8 and RISC-V (and to a lesser degree Power). The main results are an operational concurrency model for the multicopy atomic ARMv8 architecture and its equivalence proof with the reference axiomatic model, and an equivalent simpler operational model for ARMv8 and RISC-V based on Kang et al's Promising semantics for C11.

Before the PhD, from 2013 to 2014, I did the MPhil in Computer Science at the University of Cambridge, with thesis “Synthesis of impure ML from monadic HOL functions”, extending a tool for the proof-producing translation of imperative ML from HOL4 as part of the CakeML project, supervised by Magnus Myreen. Before then, from 2010-2013, I did the BSc in Computer Science at TU Dortmund. My undergradudate thesis topic was Visibly Pushdown Automata, supervised by Thomas Schwentick.

Software

With my colleagues I am working on executable formalisations of the semantics of ARMv8 and RISC-V programs. This includes the ISA semantics in Sail and concurrency models in rmem, both on github. The concurrency models can be tried in the online interface.

Publications