In this practical you'll need to write ARM Assembler and Verilog to
interface to the LED clock display via the ARM's dual ported RAM. The
ARM will have to receive bytes over the serial port and put them in
the dual ported RAM. At the same time, the FPGA should read a 16-bit
value from the dual-ported RAM and put this into a module that outputs
to the display.
First, you plug the LED display into the breadboard as you
did for lab 3 and wire it up. Then make a new
directory and download the following files:
- main.v - The main Verilog
module. This links together the ARM Stripe and the LED clock
- ledclock.v - A skeleton for
the LED clock module of Lab 3. You should insert your old Verilog into
this file, so the module can be used from main.v
- main.s - Skeleton for ARM
Assembly code. In the loop, a call to UART_RXD_HEX should be made to
receive a hex digit, and this should be saved to the dual-ported
- serialio.s - This is a
library of Assembler serial port routines for the ARM like that in lab 4.
- excalibur_pins.tcl -
The TCL script to setup the pins on the Excalibur, the same as for previous labs.
Follow the walk through from lab 4 to
create a new project and add a MegaFunction. There are however a few
minor differences in how you should set it up:
- The first four of the above files should be added to the project
- On page 6 of the MegaFunction wizard, Dual Ported RAM should be set to 32k,
and mapped to 00008000. If you click on the address here, the window to the
right should display some options to do with the Dual Ported RAM. Set DPRAM0 to
1 x single port 8K x 16 and leave Outputs registered unticked.
This will allow the FPGA to access the dual-ported RAM as a 16-bit wide block
Now the project is set up, you should modify ledclock.v by
inserting your controller code from lab
2. CLK is the system clock, LED_OUT is the 16 bit data output
port that is connected to the LED clock display, and LED_VALUE is the
16 bit value (4 x 4 bit digits) to be displayed.
Next, you need to add some code to main.s - this should call
UART_RXD_HEX and store the value returned (in r0) in the dual-ported
RAM. The address of the start of DPRAM can be obtained via the
instruction LDR rN,=EXC_DPSRAM_BLOCK0_BASE
The code should set one digit of the clock display, and move all
the other digits along. Since each digit is represented by 4 bits, the
actual data is only 2 bytes long, and all of it may be read
by one LDR instruction, loading from the address of the start of
DPRAM. The easiest way to add the extra digit is to shift the old
value left by 4 bits, and OR (instruction = ORR) the new 4 bits
Information on UART_RXD_HEX can be found in the serialio.s
- In your completed design, how does the data get from the keyboard
to the LED display?
- How would you send more than 16 bits of data from the ARM to the
- How would the ARM receive data from the FPGA?
- The interface between the ARM and the FPGA passes digits to be
displayed on the LEDs. An alternative interface could have
a bit pattern of the LED module pins as the interface, so that the ARM
could drive the LED update directly. Why wouldn't you want to do
- Pressing a key on the PC Terminal application which is in the
range '0'..'9', 'A'..'F' should output that digit on the LED
- When a new digit is entered, the digits currently on the display
should shift sideways to make room for it.
- You must give a live demonstration of your solution.
- Your ARM and Verilog code must be cleanly formatted and commented.
- Answers to the questions for the workshop must be added to the end
of your code.
- The following header must be added to all Verilog code submitted:
// ECAD+Arch Workshop 5 - ARM Interface to LEDs
// Your name
// Your college
// Your CRSid
- and the following header must be added to all assembly code submitted:
; --=== ECAD and Architecture Lab 5 ===--
; Your name
; Your college
; Your CRSid
- Show your work to one of the demonstrators (on screen or
paper). They will award you with a tick if the work is up to
- Print out your final work and add it to your portfolio to be
submitted as instructed in the Head of Department notice.