Universal Cache Miss Equations for the Memory Hierarchy

Computer systems in large enterprises and in the outsourcing industry are difficult to manage manually. This difficulty has led to a push for autonomic computing, where the goal is to have the system automatically configure its settings, tune its performance and recover from failures.

Such large systems have innumerable caches to enhance performance. One task in autonomic computing lies in sizing these caches and sharing them out among competing workloads. Cache miss equations can help to automate this task.

For the cache miss equations to be helpful, they must be universal: they must fit any real memory reference pattern and cache management policy, through parameters that can be calibrated automatically and dynamically.

This paper proposes a research program to derive such equations. This proposal is for a drastic departure from forty years of cache miss analysis.

Three cache miss equations (for main memory, database buffers and processor caches) are presented as evidence for the feasibility of the research program.

Biography:

Y.C. Tay received his B.Sc. degree from the University of Singapore and Ph.D. degree from Harvard University. He is a professor in the Departments of Mathematics and Computer Science at the National University of Singapore (http://www.comp.nus.edu.sg/~tayyc). His main research interest is performance modeling (transaction processing, wireless access, cache misses and Internet equilibrium).