Computer Laboratory

    The library provides the following features:

  • Allows power characterization of existing 10Gb/s transceivers including the breakdown of coding, frame alignment, data gearboxing, serialisation, and clock/data recovery functions,

  • Permits an automated digital design synthesis, verification and power estimation through supplied scripts,

  • Presents a semi-automated MOS Current Mode Logic optimization procedure with automated sweeping of optimization variables,

  • Presents a simple MCML cell library for high-speed component development. The library is available to the research community,

  • Supplies an initial set of basic functional blocks, which permit a custom transceiver design,

  • Presents a unique environment for integration/analysis of digital and analog design blocks.