Computer Laboratory


BERI open-source downloads

SRI International and the University of Cambridge have developed BERI, a pipelined 64-bit RISC FPGA soft-core processor designed for teaching and research in the hardware-software interface. BERI is implemented in Bluespec, a high-level hardware definition language (HDL) that compiles to efficient C simulation or Verilog descriptions suitable for FPGA implementation.

We have used BERI to prototype research such as CHERI, hardware protection extensions to RISC, and to experiment with hardware graphics compositing, as well as multithreaded and multicore CPU designs. We also use BERI as a teaching platform for our masters-level course in computer architecture.

BERI is able to boot the open-source FreeBSD operating system, and run an SSH server, gcc, Apache, and countless other off-the-shelf open-source applications and benchmarks – a complete software corpus against which novel CPU research and hardware-software approaches can be evaluated.

We have successfully synthesised BERI for both Altera and Xilinx FPGAs. We have developed device drivers for several hard- and soft-core peripherals found on Altera-based board designs, including the Terasic DE4 board. We use FPGA-based BERI systems daily in user-friendly tablet, as well as in a network-accessible rackmount "server" format permitting remote software development and experimentation.


The BERI hardware-software platform is highly experimental; users are cautioned that damage to physical FPGA hardware can result from bugs or user error. The BERI hardware-software open-source license places further limitations on warranty and liability.

Anouncement mailing list

We have created a BERI announcement mailing list that will carry news of new BERI releases, software updates, events, etc. Please subscribe to cl-beri-announce to be kept up-to-date on BERI!


BERI consists of a number of components including: physical designs (e.g., tablet packaging for the Terasic DE4); HDL descriptions of the processor and several peripherals; and adaptations of FreeBSD and other open-source software to support BERI.

BERI physical designs - June 2013

We have open sourced the hardware specs and build instructions for our Terasic DE4-based tablet design.

BERI hardware description - November 2013

We are preparing to release our Bluespec hardware description of the BERI processor, peripherals such as our BERI programmable interrupt controller, C-language simulations exposing UNIX devices within the simulation (e.g., disk images as SD cards), and control/debugging tool cherictl. We expect to announce this release in early 2014.

BERI test suite - October 2013

We have developed an extensive ISA-level test suite and pipeline fuzzing tools for the BERI processor.

FreeBSD/beri operating-system support - October 2013

We are pleased to announce that complete support for the BERI processor and peripherals has been upstreamed to the FreeBSD 10.x and 11.x operating systems. FreeBSD provides a full 64-bit UNIX environment including MMU-based process model, support for the BERI floating point unit, preemptive multitasking and multithreading, POSIX APIs, advanced security features such as Capsicum and mandatory access control, network services such as SSH, UNIX shells, gcc, Clang/LLVM, and tens of thousands of third-party applications.

The forthcoming FreeBSD 10.0 release (now in BETA) will include support for all BERI features, including the BERI processor, programmable interrupt controller, and many common hard- and soft-core peripherals including those found on the Terasic DE4: Altera triple-speed MAC (atse), Intel Strata Flash, Altera JTAG UART, 16550 UART, Altera University Programme SD Card Controller, on-board switches and LEDs, and Terasic's MTL capacitive multi-touch display. The result is a complete 64-bit operating system able to run tens of thousands of open-source applications "out of the box".

You can download FreeBSD source code using Subversion from a number of different mirror sites.

You can also browse the FreeBSD source code on cross-referencing websites such as


This hardware, software, and documentation was developed by SRI International and the University of Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) ("CTSRD"), as part of the DARPA CRASH research programme. Additional support was received from Google.

We acknowledge our many supporters, including Terasic, and our early adopter community who have provided helpful feedback and advice!