ECAD and Architecture Practical Classes
Lablet 1.2 - System on Chip Design and Software
Altera provides a mature C compiler for the NIOS II processor used in the Qsys system, which is based on Eclipse.
The aim of this section is to complete a simple C program to interact with the SoC you created. The program will be written, compiled and downloaded to the FPGA and executed. A NIOS II terminal will be used to connect standard input and output streams to the PC.
Eclipse (NIOS II) Project Creation
In Quartus, select Tools | NIOS II Software Build Tools for Eclipse. Click Browse and create a new folder called software in your project working directory. Click OK twice.
In Eclipse, select File | New | NIOS II Application and BSP from Template. A Board Support Package (BSP) will be generated automatically as a separate project; it forms a Hardware Abstraction Layer (HAL), essentially a driver that allows the NIOS to interact with the other components of your SoC.
Click ... to the right of SOPC Information File name and select hello_world.sopcinfo from your project directory. In addition to the generated Verilog modules, Qsys also generates this file describing your system. It will be used to create the BSP. Enter hello_world as the Project name and select Blank Project under Templates. Click Finish.
You may need to refer to the trouble-shooting guide at this point.
Right click on the hello_world project and select New | Source File. Set the Source file to hello_world.c (for example) and the Template to <None>. Click Finish.