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Part II CST SoC D/M Slide Pack 7 (Power)

  • Silicon Power and Technology
  • Deep submicron and Dark Silicon
  • Semi-Custom Design
  • 90 Nanometer Gate Length.
  • Delay Estimation Formula.
  • Rent's Rule Estimate of Wire Length
  • Power Estimation Formula
  • 45nm SRAM Memory Area and Power Consumption
  • Power Consumption Example
  • Power Saving Terminology
  • Save Power 1: Dynamic Clock Gating
  • Save Power 2: Dynamic Supply Gating
  • Save Power 3: Dynamic Frequency Scaling
  • Save Power 4: Dynamic Voltage Scaling
  • Big/Little Proposition
  • Future Trends
  • Power Modelling from VCD and SAIF logs.
  • Power Modelling using SystemC
  • TLM POWER 3 library for SystemC: SRAM example