»Xilinx Zynq-7000 Product Brief (PDF)
The high cost of ASIC masks now makes FPGA suitable for medium volume production.
Super FPGAs, like Zynq emerge: the dark silicon trend means we can put all IP blocks on one chip provided we leave them mostly turned off.
Xilinx Zynq solution has two ARM cores, all the standard IP blocks and an FPGA on one die.
Flexible I/O routing means physical pads can be IP block bond outs, GPIOs or FPGA.
|34: (C) 2008-13, DJ Greaves, University of Cambridge, Computer Laboratory.|