The image below shows the basic timing requirements for each row that is displayed on a VGA monitor. An active-low pulse of a set duration (time a in the figure) if applied to the horizontal synchronisation (VGA_HSYNC) of the monitor, which signifies the end of one row of data and the start of the next. The data inputs on the monitor must be off for a time period called the back porch (b) after the hsync pulse occurs, which is followed by a display interval (c). During the display interval the RGB data drives each pixel in turn across the row being displayed. Finally, there is a time period called the front porch (d) where the RGB signals must again be off before the next hsync pulse occurs. The timing of the vertical synchronisation pulses is the same, except each pulse signifies the end of one frame and the start of the next.