Computer Laboratory Home Page Search A-Z Directory Help
University of Cambridge Home Computer Laboratory
Thursday April 14th, 2005 - 4:30pm
Computer Laboratory > Research > Systems Research Group > NetOS > Seminars > Thursday April 14th, 2005 - 4:30pm

Compilers for Multi-Core Architectures

Richard Sharp

State-of-the-art programming techniques for multi-core processors tend to be low-level, requiring programmers to partition code into concurrent tasks early in the design process. In this talk I will present our attempts to address this problem in the context of the PacLang to IXP compiler we have built at Intel Research Cambridge.

In our framework designers write their programs in a high-level, domain-specific, architecturally-neutral language, but also provide a separate Architecture Mapping Script (AMS). An AMS specifies semantics-preserving transformations that are applied to the program to re-arrange it into a set of tasks appropriate for execution on a particular target architecture. As a case study I will describe a uni-cast IP packet forwarder and present an AMS that partitions it into a form capable of running at 3Gb/s on an Intel IXP2400 Network Processor.