NEXT (Example: Sequential Long Multiplication)
»Definitions (some authors vary slightly):
- Data hazard - when an operand's address is not yet computed or has not arrived in time for use,
- WaW hazard - write-after-write: the second write must occur after the first otherwise its result is lost,
- RaW or WaR hazard - write and read of a location are accidentally permuted,
- Control hazard - when it is not yet clear whether an operation should be performed,
- Alias hazard - we do not know if two array subscripts are equal,
- Structural hazard - insufficient physical resources to do everything at once.
We have a structural hazard when an operation cannot proceed because a resource is already in use.
Resources that might present structural hazards are:
- Memories and register files with insufficient ports,
- Memories with variable latency, especially DRAM,
- Insufficient number of ALUs for all the arithmetic to be schedulled in current clock tick,
- Anything non-fully pipelined i.e. something that goes busy, such as long multiplication
»Booth Multiplier or division or a floating point unit).
A non-fully pipelined component cannot start a new operation on every clock
cycle. Instead it has handshake wires that start it and inform the client
logic when it is ready.
Synchronous RAMs are generally fully pipelined and fixed-latency.
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