Used By

Subcells Used

Notes

Internal bus controller (2 used). They control the chip wide bus access for experiments contdata16G_v1 and contdyndata16G_v1

The top right two inputs are not-experiment and experiment select. anyupperZ and otheranyupperZ are cross coupled with the other controller to ensure that the 1's outputs (of the dual-rail data) of the experiments are not enabled at the same time. Similarly for anylowerZ and otheranylowerZ for the 0's outputs. selAZin_r, selBZin_r, testptsin_r come from input pads to control input bus selection and output of test points.

outlowerEz, outupperEz, selAZout, selBZout outEZctrl are all output to the appropriate experiment under control. outlowerEz and outupperEz select 0's and 1's data outputs. selAZout and selBZout select input ether from the chip wide input bus or from the feedback path within each experiment. outEZctrl controls whether the test points are output.

Key

	metal 2
	metal 1
	polysilicon
	via or contact
	N+
	P+
	N well